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5962-9951401QXX

更新时间： 2024-01-24 17:16:47
品牌 Logo 应用领域
赛灵思 - XILINX 内存集成电路
页数 文件大小 规格书
10页 92K
描述
Configuration Memory

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中文翻译

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5962-9951401QXX 技术参数

生命周期：Obsolete包装说明：,
Reach Compliance Code：unknown风险等级：5.84
内存集成电路类型：CONFIGURATION MEMORY认证状态：Not Qualified
Base Number Matches：1

5962-9951401QXX 数据手册

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0
QPRO Series Configuration  
PROMs (XQ) including  
R
Radiation-Hardened Series (XQR)  
0
2
DS062 (v3.0) February 8, 2000  
Preliminary Product Specification  
Features  
Description  
•
•
•
XQ1701L/XQR1701L  
The QPRO™ series XQ1701L are Xilinx 3.3V high-density  
configuration PROMs. The XQR1701L are radiation hard-  
ened. These devices are manufactured on Xilinx QML certi-  
fied manufacturing lines utilizing epitaxial substrates and  
TID lot qualification (per method 1019).  
QML Certified  
Configuration one-time programmable (OTP) read-only  
memory designed to store configuration bitstreams of  
Xilinx FPGA devices  
When the FPGA is in Master Serial mode, it generates a  
configuration clock that drives the PROM. A short access  
time after the rising clock edge, data appears on the PROM  
•
Simple interface to the FPGA; requires only one user  
I/O pin  
•
•
Cascadable for storing longer or multiple bitstreams  
DATA output pin that is connected to the FPGA D pin. The  
IN  
Programmable reset polarity (active High or active  
Low) for compatibility with different FPGA solutions  
FPGA generates the appropriate number of clock pulses to  
complete the configuration. Once configured, it disables the  
PROM. When the FPGA is in Slave Serial mode, the PROM  
and the FPGA must both be clocked by an incoming signal.  
Figure 1 shows a simplied block diagram.  
•
Supports XQ4000XL/Virtex fast configuration mode  
(15.0 MHz)  
•
•
•
Available in 44-pin ceramic LCC (M grade) package  
Available in 20-pin SOIC package (XQ1701L only)  
Multiple devices can be concatenated by using the CEO  
output to drive the CE input of the following device. The  
clock inputs and the DATA outputs of all PROMs in this  
chain are interconnected. All devices are compatible and  
can be cascaded with other members of the family.  
Programming support by leading programmer  
manufacturers.  
•
Design support using the Xilinx Alliance and  
Foundation series software packages.  
For device programming, either the Xilinx Alliance or Foun-  
dation series development system compiles the FPGA  
design file into a standard Hex format, which is then trans-  
ferred to most commercial PROM programmers.  
•
XQR1701L (only)  
•
Fabricated on Epitaxial Silicon to improve latch  
performance (parts are immune to Single Event  
Latch-up)  
•
•
•
Single Event Bit Upset immune  
Total Dose tolerance in excess of 50K rads(Si)  
All lots subjected to TID Lot Qualification in accordance  
with method 1019 (dose rate ~9.0 rads(Si)/sec)  
•
XQ1701L (only)  
•
Also available under the following Standard Microcircuit  
Drawing (SMD): 5962-9951401. For more information  
contact hte Defense Supply Center Columbus (DSCC):  
http://www.dscc.dla.mil/Programs/Smcr/  
©2001 Xilinx, Inc. All rightsreserved. All Xilinxtrademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm  
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.  
.
DS062 (v3.0) February 8, 2000  
www.xilinx.com  
1
Preliminary Product Specification  
1-800-255-7778  
1234567...10

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