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5962-9451801MLA PDF预览

5962-9451801MLA

更新时间: 2024-01-26 04:03:43
品牌 Logo 应用领域
亚德诺 - ADI 信息通信管理转换器
页数 文件大小 规格书
12页 184K
描述
LC2MOS Complete, Dual 12-Bit MDAC, (8 + 4) Loading Structure

5962-9451801MLA 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP24,.3针数:24
Reach Compliance Code:not_compliantECCN代码:3A001.A.2.C
HTS代码:8542.39.00.01风险等级:5.06
Is Samacsys:N最大模拟输出电压:10 V
最小模拟输出电压:-10 V转换器类型:D/A CONVERTER
输入位码:BINARY, OFFSET BINARY输入格式:PARALLEL, WORD
JESD-30 代码:R-GDIP-T24JESD-609代码:e0
最大线性误差 (EL):0.0244%标称负供电电压:-15 V
位数:12功能数量:2
端子数量:24最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP24,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT APPLICABLE电源:+-15 V
认证状态:Qualified筛选级别:MIL-STD-883
座面最大高度:5.715 mm标称安定时间 (tstl):3 µs
子类别:Other Converters最大压摆率:10 mA
标称供电电压:15 V表面贴装:NO
技术:BICMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE宽度:7.62 mm
Base Number Matches:1

5962-9451801MLA 数据手册

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LC2MOS  
Complete, Dual 12-Bit MDACs  
a
AD7837/AD7847  
FEATURES  
FUNCTIONAL BLOCK DIAGRAMS  
Two 12-Bit MDACs with Output Amplifiers  
4-Quadrant Multiplication  
V
DD  
Space-Saving 0.3", 24-Lead DIP and 24-Terminal  
SOIC Package  
Parallel Loading Structure: AD7847  
(8 + 4) Loading Structure: AD7837  
MS INPUT  
LATCH  
LS INPUT  
LATCH  
AD7837  
4
8
DAC LATCH A  
R
V
12  
APPLICATIONS  
Automatic Test Equipment  
Function Generation  
Waveform Reconstruction  
Programmable Power Supplies  
Synchro Applications  
FBA  
DAC A  
V
V
OUTA  
REFA  
AGNDA  
REFB  
R
DB0  
DB7  
FBB  
DAC B  
V
OUTB  
LDAC  
CS  
12  
AGNDB  
DAC LATCH B  
CONTROL  
LOGIC  
4
8
WR  
A0  
MS INPUT  
LATCH  
LS INPUT  
LATCH  
GENERAL DESCRIPTION  
A1  
The AD7837/AD7847 is a complete, dual, 12-bit multiplying  
digital-to-analog converter with output amplifiers on a mono-  
lithic CMOS chip. No external user trims are required to  
achieve full specified performance.  
V
V
DGND  
SS  
Both parts are microprocessor compatible, with high speed data  
latches and interface logic. The AD7847 accepts 12-bit parallel  
data which is loaded into the respective DAC latch using the  
WR input and a separate Chip Select input for each DAC. The  
AD7837 has a double-buffered 8-bit bus interface structure  
with data loaded to the respective input latch in two write opera-  
tions. An asynchronous LDAC signal on the AD7837 updates  
the DAC latches and analog outputs.  
DD  
AD7847  
DAC LATCH A  
V
DAC A  
V
OUTA  
REFA  
V
AGNDA  
REFB  
DB0  
The output amplifiers are capable of developing 10 V across a  
2 kload. They are internally compensated with low input off-  
set voltage due to laser trimming at wafer level.  
DB11  
DAC B  
V
OUTB  
WR  
CSA  
CSB  
AGNDB  
CONTROL  
LOGIC  
DAC LATCH B  
The amplifier feedback resistors are internally connected to  
V
OUT on the AD7847.  
The AD7837/AD7847 is fabricated in Linear Compatible CMOS  
(LC2MOS), an advanced, mixed technology process that com-  
bines precision bipolar circuits with low power CMOS logic.  
V
DGND  
SS  
PRODUCT HIGHLIGHTS  
A novel low leakage configuration (U.S. Patent No. 4,590,456)  
ensures low offset errors over the specified temperature range.  
1. The AD7837/AD7847 is a dual, 12-bit, voltage-out MDAC  
on a single chip. This single chip design offers considerable  
space saving and increased reliability over multichip designs.  
2. The AD7837 and the AD7847 provide a fast versatile inter-  
face to 8-bit or 16-bit data bus structures.  
REV. C  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  

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