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5962-9067101MRA PDF预览

5962-9067101MRA

更新时间: 2024-01-07 05:46:55
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 552K
描述
LVDT Signal Conditioner

5962-9067101MRA 技术参数

生命周期:Active零件包装代码:DIP
包装说明:DIP,针数:20
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.8
转换器类型:SIGNAL CONDITIONERJESD-30 代码:R-GDIP-T20
JESD-609代码:e0最大负电源电压:-18 V
最小负电源电压:-12 V标称负供电电压:-15 V
功能数量:1端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Qualified
筛选级别:MIL-STD-883最大供电电压:18 V
最小供电电压:12 V标称供电电压:15 V
表面贴装:NO温度等级:MILITARY
端子面层:TIN LEAD端子形式:THROUGH-HOLE
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

5962-9067101MRA 数据手册

 浏览型号5962-9067101MRA的Datasheet PDF文件第10页浏览型号5962-9067101MRA的Datasheet PDF文件第11页浏览型号5962-9067101MRA的Datasheet PDF文件第12页浏览型号5962-9067101MRA的Datasheet PDF文件第13页浏览型号5962-9067101MRA的Datasheet PDF文件第15页浏览型号5962-9067101MRA的Datasheet PDF文件第16页 
AD598  
R1 and R2 are chosen to be 80.9 kresistors to give a ±10 V  
full-scale output signal for a single Schaevitz E100 LVDT. R3 is  
chosen to be 40.2 kto give a ±10 V output signal when the  
two E100 LVDT output signals are summed. The output volt-  
age for this circuit is given by:  
PRECISION DIFFERENTIAL GAGING  
The circuit shown in Figure 26 is functionally similar to the dif-  
ferential gaging circuit shown in Figure 25. In contrast to Figure  
25, it provides a means of independently adjusting the scale fac-  
tor of each LVDT so that both scale factors may be matched.  
The two LVDTs are driven in a master-slave arrangement  
where the output signal from the slave LVDT is summed with  
the output signal from the master LVDT. The scale factor of the  
slave LVDT only is adjusted with R1 and R2. The summed  
scale factor of the master LVDT and the slave LVDT is ad-  
justed with R3.  
(VA VB) (VC VD) R2  
(VA +VB) (VC +VD) R1  
VOUT  
=
+
×
× 500 µA × R3.  
+
V
V
0.1µF  
0.1µF  
+VS  
20  
19  
1
–VS  
OFFSET 1  
2
3
EXC 1  
EXC 2  
LEV 1  
LEV 2  
FREQ 1  
FREQ 2  
B1 FILT  
B2 FILT  
VB  
OFFSET 2 18  
17  
4
SIG REF  
VOUT  
±
10V  
FULL SCALE  
16  
15  
14  
13  
12  
11  
SIG OUT  
FEEDBACK  
OUT FILT  
A1 FILT  
A2 FILT  
V
5
0.015µF  
R3 40.2kΩ  
0.33µF  
6
7
15kΩ  
8
0.1µF  
9
A
15kΩ  
0.1µF  
10  
AD598  
A
B
MASTER LVDT  
R1  
80.9kΩ  
+
V
V
SCHAEVITZ E 100  
0.1µF  
0.1µF  
C
+VS  
20  
19  
1
2
3
4
5
6
7
8
9
–VS  
OFFSET 1  
EXC 1  
EXC 2  
LEV 1  
D
SLAVE  
LVDT  
OFFSET 2 18  
R2  
80.9kΩ  
17  
SIG REF  
16  
15  
14  
13  
12  
11  
SIG OUT  
FEEDBACK  
OUT FILT  
A1 FILT  
A2 FILT  
V
LEV 2  
FREQ 1  
FREQ 2  
B1 FILT  
B2 FILT  
0.33µF  
0.1µF  
0.1µF  
10 VB  
AD598  
A
V
V
A
A
–V  
+V  
B
B
V
V
C
C
–V  
+V  
D
D
R2  
R1  
VOUT  
=
+
500µA R3  
Figure 26. Precision Differential Gaging  
–14–  
REV. A  

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