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5962-9054902MQA PDF预览

5962-9054902MQA

更新时间： 2024-02-13 08:58:39
品牌 Logo 应用领域
英特矽尔 - INTERSIL 解码器电信集成电路编码器
页数 文件大小 规格书
16页 267K
描述
CMOS Manchester Encoder-Decoder

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5962-9054902MQA 技术参数

生命周期：Obsolete包装说明：,
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.83功能数量：1
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC, GLASS-SEALED封装形式：IN-LINE
认证状态：Not Qualified筛选级别：MIL-STD-883
标称供电电压：5 V表面贴装：NO
技术：CMOS电信集成电路类型：MANCHESTER ENCODER/DECODER
温度等级：MILITARY端子形式：THROUGH-HOLE
端子位置：DUALBase Number Matches：1

5962-9054902MQA 数据手册

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HD-15531  
Pin Description (Continued)  
PIN  
NUMBER TYPE  
NAME  
SECTION  
DESCRIPTION  
14  
15  
O
DECODER SHIFT  
CLOCK  
Decoder Output which delivers a frequency (DECODER CLOCK + 1 2), synchronous by  
the recovered serial data stream.  
I
TRANSITION SE-  
LECT  
Decoder A high input to this pin causes the transition finder to synchronize on every tran-  
sition of input data. A low input causes the transition finder to synchronize only  
on mid-bit transitions.  
16  
17  
NC  
Blank  
Not connected.  
O
I
COMMAND SYNC  
Decoder Output of a high from this pin occurs during output of decoded data which was  
preceded by a Command (or Status) synchronizing character.  
18  
19  
20  
DECODER PARITY  
SELECT  
Decoder An input for parity sense, calling for even parity with input high and odd parity  
with input low.  
I
DECODER RESET  
Decoder A high input to this pin during a rising edge of DECODER SHIFT CLOCK resets  
the decoder bit counting logic to a condition ready for a new word.  
I
COUNT C0  
Both  
One of five binary inputs which establish the total bit count to be encoded or de-  
coded.  
21  
22  
GROUND  
Both  
Both  
Supply pin.  
I
MASTER RESET  
A high on this pin clears 2:1 counters in both encoder and decoder, and resets  
the ÷ 6 circuit.  
23  
24  
25  
I
COUNT C2  
Both  
See pin 20.  
O
O
÷ 6 OUT  
Encoder Output from 6:1 divider which is driven by the ENCODER CLOCK.  
BIPOLAR ZERO  
OUT  
Encoder An active low output designed to drive the zero or negative sense of a bipolar  
line driver.  
26  
27  
I
OUTPUT INHIBIT  
Encoder A low on this pin forces pin 25 and 27 high, the inactive states.  
O
BIPOLAR ONE OUT  
Encoder An active low output designed to drive the one or positive sense of a bipolar line  
driver.  
28  
29  
I
I
SERIAL DATA IN  
Encoder Accepts a serial data stream at a data rate equal to ENCODER SHIFT CLOCK.  
ENCODER ENABLE  
Encoder A high on this pin initiates the encode cycle. (Subject to the preceding cycle be-  
ing complete).  
30  
31  
I
I
SYNC SELECT  
Encoder Actuates a Command sync for an input high and Data sync for an input low.  
Encoder Sets transmit parity odd for a high input, even for a low input.  
ENCODER PARITY  
SELECT  
32  
33  
34  
O
I
SEND DATA  
Encoder Is an active high output which enables the external source of serial data.  
SEND CLOCK IN  
Encoder Clock input at a frequency equal to the data rate X2, usually driven by ÷ 6 output.  
O
ENCODER SHIFT  
CLOCK  
Encoder Output for shifting data into the Encoder. The Encoder samples SDI pin-28 on  
the low-to-high transition of ESC.  
35  
36  
37  
NC  
Blank  
Both  
Not connected.  
See pin 20.  
I
I
COUNT C3  
ENCODER CLOCK  
Encoder Input to the 6:1 divider, a frequency equal to 12 times the data rate is usually  
input here.  
38  
O
DATA SYNC  
Decoder Output of a high from this pin occurs during output of decoded data which was  
preceded by a data synchronizing character.  
39  
40  
I
I
COUNT C4  
COUNT C1  
Both  
Both  
See pin 20.  
See pill 20.  
4
1234567...16

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