Datasheet > 5962-8967801XA

5962-8967801XA

更新时间： 2024-01-13 00:57:20

品牌	Logo	应用领域
亚德诺 - ADI		输入元件转换器
页数	文件大小	规格书
16页	215K
描述
IC QUAD, PARALLEL, 8 BITS INPUT LOADING, 0.19 us SETTLING TIME, 8-BIT DAC, CDIP28, 0.600 INCH, GLASS SEALED, CERDIP-28, Digital to Analog Converter

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5962-8967801XA 技术参数

生命周期：	Obsolete	包装说明：	DIP,
Reach Compliance Code：	unknown	风险等级：	5.84
转换器类型：	D/A CONVERTER	输入位码：	BINARY, OFFSET BINARY
输入格式：	PARALLEL, 8 BITS	JESD-30 代码：	R-GDIP-T28
JESD-609代码：	e0	位数：	8
功能数量：	4	端子数量：	28
最高工作温度：	125 °C	最低工作温度：	-55 °C
封装主体材料：	CERAMIC, GLASS-SEALED	封装代码：	DIP
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	认证状态：	Not Qualified
座面最大高度：	5.72 mm	标称安定时间 (tstl)：	0.19 µs
标称供电电压：	5 V	表面贴装：	NO
技术：	CMOS	温度等级：	MILITARY
端子面层：	TIN LEAD	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	15.24 mm
Base Number Matches：	1

5962-8967801XA 数据手册

DAC8408

Tim ing Diagram

P ARAMETER D EFINITIO NS

RESO LUTIO N

AC FEED TH RO UGH ERRO R

T his is the error caused by capacitance coupling from V_REFto

the DAC output with all switches off.

Resolution is the number of states (2ⁿ) that the full-scale range

(FSR) of a DAC is divided (or resolved) into.

SETTLING TIME

NO NLINEARITY

Nonlinearity (Relative Accuracy) is a measure of the maximum

deviation from a straight line passing through the end-points of

the DAC transfer function. It is measured after adjusting for

ideal zero and full-scale and is expressed in LSB, %, or ppm of

full-scale range.

Settling T ime is the time required for the output function of the

DAC to settle to within 1/2 LSB for a given digital input signal.

P RO P AGATIO N D ELAY

T his is a measure of the internal delays of the DAC. It is defined

as the time from a digital input change to the analog output cur-

rent reaching 90% of its final value.

D IFFERENTIAL NO NLINEARITY

Differential Nonlinearity is the worst case deviation of any adja-

cent analog outputs from the ideal 1 LSB step size. A specified

differential nonlinearity of ±1 LSB maximum over the operating

temperature range ensures monotonicity.

CH ANNEL-TO -CH ANNEL ISO LATIO N

T his is the portion of input signal that appears at the output of a

DAC from another DAC’s reference input. It is expressed as a

ratio in dB.

GAIN ERRO R

D IGITAL CRO SSTALK

Gain Error (full-scale error) is a measure of the output error be-

tween the ideal and actual DAC output. T he ideal full-scale

output is V_REF–1 LSB.

Digital Crosstalk is the glitch energy transferred to the output of

one DAC due to a change in digital input code from other

DACs. It is specified in nVs.

O UTP UT CAP ACITANCE

Output Capacitance is that capacitance between I_{OUT 1A}, I_{OUT 1B}

_{OUT 1C}, or I_{OUT 1D}and AGND.

REV. A

–7–

1...4 5 678 9 10...16

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与5962-8967801XA相关器件

型号	品牌	描述	获取价格	数据表
5962-8967801XX	ETC	8-Bit Digital-to-Analog Converter	获取价格
5962-8967802XX	ETC	8-Bit Digital-to-Analog Converter	获取价格
5962-8967901QA	CIRRUS	16, 14 & 12-Bit, Self-Calibrating A/D Converters	获取价格
5962-8967901QX	ETC	Analog-to-Digital Converter， 12-Bit	获取价格
5962-8967901XA	CIRRUS	16, 14 & 12-Bit, Self-Calibrating A/D Converters	获取价格
5962-8967901XX	ETC	Analog-to-Digital Converter， 12-Bit	获取价格

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