Datasheet > 5962-8838032A

5962-8838032A

更新时间： 2022-11-24 21:43:16

品牌	Logo	应用领域
亚德诺 - ADI		运算放大器
页数	文件大小	规格书
8页	162K
描述
Dual Precision JFET-Input Operational Amplifier

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5962-8838032A 数据手册

OP215–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS _{(at V = ±15 V, T = 25ꢁC, unless otherwise noted.)}

OP215E

Type

OP215G

Type

Parameter

Symbol

Conditions

Min

Max

Min

Max

Unit

Input Offset Voltage

V_OS

R_S= 50 W

‘G’ Grade

0.2

1.0

2.0

2.5

4.0

6.0

Input Offset Current¹

Input Bias Current¹

Input Resistance

I_OS

I_B

T_j= 25∞C

100

200

Device Operating

T_j= 25∞C

Device Operating

± 15

± 18

10^1,2

± 100

± 300

± 15

± 18

10^1,2

± 300

± 600

R_IN

Large-Signal Voltage

Gain

A_VO

R_LՆ 2 kW,

V_O= ± 10 V

150

500

200

V/mV

Output Voltage Swing

Supply Current

Slew Rate

V_O

I_SY

R_L= 10 kW

R_L= 2 kW

± 12

± 11

± 13

± 12

± 11

± 13

± 12.7

6.0

8.5

7.0

10.0

12.0

‘G’ Grade

A_VCL= 1

V/␮s

Gain Bandwidth

Product³

GBW

3.5

5.7

3.0

5.4

MHz

Closed-Loop Bandwidth CLBW

A_VCL= 1

MHz

Setting Time

t_S

To 0.01%

To 0.05%²

To 0.10%

2.3

1.1

0.9

2.4

1.2

1.0

␮s

Input Voltage Range

IVR

10.2

–10.2

14.8

–11.5

10.1

–10.1

14.8

–11.5

Common-Mode

Rejection Ratio

CMRR

V_CM= ± IVR

100

E, G Grades

Power Supply Rejection PSRR

Ratio

V_S= ± 10 V to ± 16 V

V_S= ± 10 V to ± 15 V

␮V/V

100

Input Noise Voltage

Density

␪n

f_O= 100 Hz

f_O= 1,000 Hz

nV/÷Hz

Input Noise Current

Density

I_n

f_O= 100 Hz

f_O= 1,000 Hz

0.01

pA/÷Hz

Input Capacitance

C_IN

NOTES

¹Input bias current is specified for two different conditions. The T_j= 25∞C specification is with the junction at ambient temperature; the device operating specification is

with the device operating in a warmed up condition at 25∞C ambient. The warmed up bias-current value is correlated to the junction temperature value via the curves

of I_Sversus T_jand I_Sversus T_A. PMI has a bias-current compensation circuit that gives improved bias current and bias current over temperature versus standard

JFET input op amps. I_Sand I_OSare measured at V_CM= 0.

²Setting time is defined here for a unity gain inverter connection using 2 kW resistors. It is the time required for the error voltage (the voltage at the inverting input pin

on the amplifier) to settle to within a specified percent of its final value from the time a 10 V step input is applied to the inverter. See setting time test circuit.

³Sample tested.

Specifications are subject to change without notice.

–2–

REV. A

123 4 5 6 7 8

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