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5962-0920503HXA PDF预览

5962-0920503HXA

更新时间： 2024-02-01 17:22:13
品牌 Logo 应用领域
MICROSS 内存集成电路
页数 文件大小 规格书
27页 372K
描述
Flash, 1MX32, 90ns, CQFP68, HERMETIC SEALED, CERAMIC, QFP-68

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5962-0920503HXA 技术参数

生命周期：Transferred零件包装代码：QFP
针数：68Reach Compliance Code：unknown
ECCN代码：3A001.A.2.CHTS代码：8542.32.00.51
风险等级：5.67最长访问时间：90 ns
启动块：BOTTOM数据轮询：YES
JESD-30 代码：S-XQFP-G68内存密度：33554432 bit
内存集成电路类型：FLASH MODULE内存宽度：32
部门数/规模：1,2,1,15端子数量：68
字数：1048576 words字数代码：1000000
最高工作温度：125 °C最低工作温度：-55 °C
组织：1MX32封装主体材料：CERAMIC
封装代码：QFP封装等效代码：QFP68,.99SQ,50
封装形状：SQUARE封装形式：FLATPACK
并行/串行：PARALLEL电源：3.3 V
认证状态：Not Qualified筛选级别：38535Q/M;38534H;883B
部门规模：4K,2K,8K,16K最大待机电流：0.00025 A
子类别：Flash Memories最大压摆率：0.14 mA
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：HYBRID温度等级：MILITARY
端子形式：GULL WING端子节距：1.27 mm
端子位置：QUAD切换位：NO
类型：NOR TYPEBase Number Matches：1

5962-0920503HXA 数据手册

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FLASH  
AS8FLC1M32  
Table 2  
Sector Size  
(Kbytes)  
Sector  
A19  
A18  
A17  
A16  
A15  
A14  
A13  
SA0  
SA1  
SA2  
SA3  
SA4  
SA5  
SA6  
SA7  
SA8  
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
1
1
X
0
1
16  
8
8
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
32  
64  
64  
64  
64  
64  
64  
64  
64  
64  
64  
64  
64  
64  
64  
64  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SA9  
SA10  
SA11  
SA12  
SA13  
SA14  
SA15  
SA16  
SA17  
SA18  
Program and Erase Operation Status  
The AUTOMATIC SLEEP mode is independent of the CSx\,  
WEx\ and OE\ control signals. Standard address access  
timings provide new data when addresses are changed. While  
in sleep mode, output data is latched and always available to  
the system. ICC5 in the “DC Characteristics Table represents  
the AUTOMATIC SLEEP mode current usage.  
During an ERASE or PROGRAM operation, the system may  
check the status of the operation by reading the status bits on  
each of the seven data I/O bits within each byte of the MCM  
FLASH array. Standard READ cycle timings and ICC read  
specifications apply. Refer to “Write Operation Status” for  
more information, and to “AC Characteristics” for timing  
specifications.  
RESET\: Hardware Reset Pin  
The RESET\ pin provides a hardware method of resetting  
the device to reading array data. When the RESET\ pin is  
driven low for at least a period of tRP, the device immediately  
terminates any operation in progress, tristates all output pins,  
and ignores all READ/WRITE commands for the duration of the  
RESET\ pulse. The device also resets the internal state machine  
to reading array data. The operation that was interrupted  
should be reinitiated once the device is ready to accept another  
command sequence, to ensure data integrity.  
Standby Mode  
When the system is not READING or WRITING to the device,  
it can place the device in the standby mode to save on power  
consumption.  
The device enters the CMOS STANDBY mode when the CSx\  
and RESET\ pins are held at VCC+/-0.3v. If CSx\ and RESET\  
are held at VIH, but not within VCC+/-0.3v, the device will  
be in STANDBY mode but at levels higher than achievable in  
full CMOS STANDBY. The device requires standard access  
time (tCE) for read access when the device is in either of these  
STANDBY modes, before it is ready to READ data.  
Current is reduced for the duration of the RESET\ pulse.  
When RESET\ is held at VSS+/-0.3v, the device draws CMOS  
STANDBY current (ICC4). If RESET\ is held at VIL but not  
within the limits of VCC +/- 0.3v, the MCM Array will be in  
STANDBY, but current limits will be higher than those listed  
under ICC4.  
If the device is deselected during ERASURE or  
PROGRAMMING, the device draws active current until the  
operation is completed.  
The RESET\ pin may be tied to the system reset circuitry. A  
system reset would thus also reset the FLASH array, enabling  
the system to read the boot-up firmware code from the boot  
block area of the memory.  
In the DC Characteristics table, ICC3 and ICC4 represent the  
STANDBY MODE currents.  
Automatic Sleep Mode  
The AUTOMATIC SLEEP mode minimizes FLASH device  
energy consumption. The device automatically enables this  
mode when addresses remain stable for tACC + 30ns.  
Micross Components reserves the right to change products or specifications without notice.  
AS8FLC1M32B  
Rev. 4.1 10/10  
4
1234567...27

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