Datasheet > 54FCT373ATQ

54FCT373ATQ

更新时间： 2022-12-01 19:32:28

品牌	Logo	应用领域
艾迪悌 - IDT		光电二极管
页数	文件大小	规格书
7页	89K
描述
Bus Transceiver, 1-Func, 8-Bit, CMOS, PDSO20

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数据手册

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54FCT373ATQ 数据手册

IDT54/74FCT373T/AT/CT

FASTCMOSOCTALTRANSPARENTLATCH

MILITARYANDINDUSTRIALTEMPERATURERANGES

TESTCIRCUITSANDWAVEFORMS

VCC

SWITCHPOSITION

7.0V

Test

Switch

Closed

Open

500W

Open Drain

Disable Low

Enable Low

VOUT

VIN

Pulse

Generator

D.U.T

All Other Tests

50pF

500W

DEFINITIONS:

CL = Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

Octal Link

Test Circuits for All Outputs

DATA

1.5V

INPUT

LOW-HIGH-LOW

tSU

1.5V

PULSE

1.5V

TIMING

INPUT

ASYNCHRONOUS CONTROL

tREM

PRESET

CLEAR

ETC.

1.5V

HIGH-LOW-HIGH

PULSE

1.5V

SYNCHRONOUS CONTROL

PRESET

1.5V

CLEAR

tSU

CLOCK ENABLE

ETC.

Pulse Width

Octal Link

Set-Up, Hold, and Release Times

ENABLE

DISABLE

1.5V

SAME PHASE

CONTROL

INPUT

1.5V

INPUT TRANSITION

tPLH

tPHL

tPZL

tPLZ

VOH

1.5V

VOL

OUTPUT

3.5V

1.5V

3.5V

VOL

VOH

OUTPUT

NORMALLY

LOW

SWITCH

CLOSED

0.3V

1.5V

tPZH

tPHZ

OPPOSITE PHASE

INPUT TRANSITION

OUTPUT

NORMALLY

HIGH

SWITCH

OPEN

1.5V

Octal Link

Propagation Delay

Enable and Disable Times

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

1...3 4 567

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