Datasheet > 54ACTQ657FMX

54ACTQ657FMX

更新时间： 2024-02-05 06:51:05

品牌	Logo	应用领域
德州仪器 - TI		输出元件逻辑集成电路
页数	文件大小	规格书
12页	216K
描述
ACT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, CDFP24, CERAMIC, FP-24

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技术参数
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54ACTQ657FMX 技术参数

生命周期：	Obsolete	包装说明：	DFP,
Reach Compliance Code：	unknown	风险等级：	5.74
其他特性：	WITH DIRECTION CONTROL	系列：	ACT
JESD-30 代码：	R-GDFP-F24	长度：	15.4305 mm
逻辑集成电路类型：	BUS TRANSCEIVER	位数：	8
功能数量：	1	端口数量：	2
端子数量：	24	最高工作温度：	125 °C
最低工作温度：	-55 °C	输出特性：	3-STATE
输出极性：	TRUE	封装主体材料：	CERAMIC, GLASS-SEALED
封装代码：	DFP	封装形状：	RECTANGULAR
封装形式：	FLATPACK	传播延迟（tpd）：	9 ns
认证状态：	Not Qualified	座面最大高度：	2.286 mm
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	MILITARY
端子形式：	FLAT	端子节距：	1.27 mm
端子位置：	DUAL	Base Number Matches：	1

54ACTQ657FMX 数据手册

March 1993

74ACQ657 54ACTQ/74ACTQ657

Quiet Series Octal Bidirectional Transceiver

with 8-Bit Parity Generator/Checker

and TRI-STATE Outputs

General Description

Features

Guaranteed simultaneous switching noise level and

dynamic threshold performance

Guaranteed pin-to-pin skew AC performance

Combines the ’245 and the ’280 functions in one

package

The ’ACQ/’ACTQ657 contains eight non-inverting buffers

with TRI-STATE outputs and an 8-bit parity generator/

checker. Intended for bus oriented applications, the device

combines the ’245 and the ’280 functions in one package.

The ’ACQ/’ACTQ utilizes NSC Quiet Series technology to

guarantee quiet output switching and improved dynamic

threshold performance. FACT Quiet Series^TMfeatures

GTO^TMoutput control and undershoot corrector in addition

to a split ground bus for superior performance.

300 mil 24-pin slim dual-in-line package

Outputs source/sink 24 mA

’ACTQ has TTL-compatible inputs

Standard Military Drawing (SMD)

Ð ’ACTQ657: 5962-92197

Logic Symbols

Connection Diagrams

IEEE/IEC

Pin Assignment

for DIP, SOIC

and Flatpak

Pin Assignment

for LCC

TL/F/10636–3

TL/F/10636–2

TL/F/10636–1

Pin Names

Description

A –A

Data Inputs/TRI-STATE Outputs

Transmit/Receive Input

Enable Input

B –B

T/R

PARITY

Parity Input/TRI-STATE Output

ODD/EVEN Parity Input

Error TRI-STATE Output

ODD/EVEN

ERROR

TL/F/10636–4

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

FACT Quiet Series^TMand GTO^TMare trademarks of National Semiconductor Corporation.

1995 National Semiconductor Corporation

TL/F/10636

RRD-B30M75/Printed in U. S. A.

12 3 4 5 6 7...12

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