Datasheet > 530EB1224M00DGR

530EB1224M00DGR

更新时间： 2023-06-15 00:00:00

品牌	Logo	应用领域
芯科 - SILICON		/
页数	文件大小	规格书
12页	111K
描述
LVPECL Output Clock Oscillator, 1224MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

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530EB1224M00DGR 数据手册

Si530/531

6. 6-Pin PCB Land Pattern

Figure 4 illustrates the 6-pin PCB land pattern for the Si530/531. Table 13 lists the values for the dimensions shown

in the illustration.

Figure 4. Si530/531 PCB Land Pattern

Table 13. PCB Land Pattern Dimensions (mm)

Dimension

Min

Max

5.08 REF

2.54 BSC

4.15 REF

0.84

2.00

—

8.20 REF

7.30 REF

1.70 TYP

2.15 REF

—

6.78

6.30

Notes:

1. Dimensioning and tolerancing per the ANSI Y14.5M-1994 specification.

2. Land pattern design based on IPC-7351 guidelines.

3. All dimensions shown are at maximum material condition (MMC).

4. Controlling dimension is in millimeters (mm).

Rev. 1.2

1...7 8 91011 12

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