High Gain Darlington Output
Optocouplers
Technical Data
4N45
4N46
The high current transfer ratio at
very low input currents permits
circuit designs in which adequate
margin can be allowed for the
effects of optical coupling
variations.
Features
• High Current Transfer
Ratio–1500% Typical
• Low Input Current
Requirement–0.5 mA
• Performance Guaranteed
over 0°C to 70°C
Description
The 4N45/46 optocouplers
contain a GaAsP light emitting
diode optically coupled to a high
gain photodetector IC.
The excellent performance over
temperature results from the
inclusion of an integrated emitter-
base bypass resistor which shunts
photodiode and first stage
leakage currents as well as
bleeding off excess base drive to
ground. External access to the
second stage base provides the
capability for better noise
rejection than a conventional
photodarlington detector. An
external resistor or capacitor at
the base can be added to make a
gain-bandwidth or input current
threshold adjustment. The base
lead can also be used for
The 4N46 has a 350% minimum
CTR at an input current of only
0.5 mA making it ideal for use in
low input current applications
such as MOS, CMOS and low
power logic interfacing. Compat-
ibility with high voltage CMOS
logic systems is assured by the
20 V minimum breakdown
Temperature Range
• Internal Base-Emitter
Resistor Minimizes Output
Leakage
• Gain-Bandwidth Adjustment
Pin
• Safety Approval
UL Recognized -2500 V rms for
1 Minute
voltage of the output transistor
and by the guaranteed maximum
output leakage (IOH) at 18 V.
CSA Approved
Applications
• Telephone Ring Detector
• Digital Logic Ground
Isolation
• Low Input Current Line
Receiver
• Line Voltage Status
Indicator–Low Input Power
Dissipation
• Logic to Reed Relay Interface
• Level Shifting
The 4N45 has a 250% minimum
CTR at 1.0 mA input current and
a 7 V minimum breakdown
voltage rating.
feedback.
Selection for lower input current
down to 250 µA is available upon
request.
Functional Diagram
TRUTH TABLE
(POSITIVE LOGIC)
6
ANODE
1
2
V
V
B
LED
ON
OUTPUT
• Interface Between Logic
Families
L
OFF
H
5
4
CATHODE
O
3
GND
*JEDEC Registered Data
**JEDEC Registered up to 70°C.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.