TERMINAL CONNECTIONS
TERMINAL CONNECTIONS
GND
SI
SCLK
CS
SO
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VDD
AMUX
INT
SP7
SP6
2
3
4
SP0
SP1
SP2
SP3
SG0
SG1
SG2
SG3
SG4
SG5
SG6
VPWR
5
6
7
SP5
SP4
8
9
SG7
SG8
SG9
SG10
SG11
SG12
SG13
WAKE
10
11
12
13
14
15
16
Figure 3. 33975 Terminal Connections
Table 2. Terminal Definitions
A functional description of each terminal can be found in the Functional Terminal Description section on page 11.
Terminal
Name
Terminal
Formal Name
Description
Ground for logic, analog, and switch-to-battery inputs.
SPI control data input terminal from MCU to 33975.
SPI control clock input terminal.
1
2
3
4
GND
SI
Ground
SPI Slave In
Serial Clock
Chip Select
SCLK
CS
SPI control chip select input terminal from MCU to 33975. Logic [0] allows data
to be transferred in.
Programmable switch-to-battery or switch-to-ground input terminals.
5–8
25–28
SPn
SGn
Programmable Switches 0–3
Programmable Switches 4–7
Switch-to-ground input terminals.
9–15,
18–24
Switch-to-Ground Inputs 0–6
Switch-to-Ground Inputs 13–7
Battery supply input terminal. This terminal requires external reverse battery
protection.
16
17
VPWR
WAKE
Battery Input
Open drain wake-up output is designed to control a power supply enable
terminal.
Wake-Up
Open-drain output to MCU is used to indicate input switch change of state.
Analog multiplex output.
29
30
31
32
INT
AMUX
VDD
SO
Interrupt
Analog Multiplex Output
Voltage Drain Supply
SPI Slave Out
3.3/5.0 V supply sets SPI communication level for SO driver.
Provides digital data from 33975 to MCU.
33975
Analog Integrated Circuit Device Data
Freescale Semiconductor
4