Datasheet > 33897

33897

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
飞思卡尔 - FREESCALE		/
页数	文件大小	规格书
21页	771K
描述
Single Wire CAN Transceiver

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数据手册

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33897 数据手册

PIN CONNECTIONS

33897/A/C/T

GND

TXD

GND

33897B/D

GND

BUS

TXD

MODE0

MODE1

RXD

BUS

MODE0

MODE1

RXD

LOAD

VBATT

CNTL

GND

LOAD

VBATT

GND

Figure 4. 33897/A/B/C/D/T Pin Connections

Table 2. Pin Definitions

A functional description of each terminal can be found in the Functional Pin Description section, beginning on page 13.

33897/A/C/T

Terminal

33897B/D

Terminal

Pin Name

Formal Name

Definition

Electrical Common Ground and Heat removal. A good thermal path

will also reduce the die temperature.

1, 7, 8, 14

GND

Ground

Data input here will appear on the BUS terminal. A logic [0] will assert

the bus, a logic [1] will make the bus go to the recessive state.

3, 4

TXD

Transmit Data

Mode Control

Receive Data

No Connect

These Pins control Sleep Mode, Transmit Level, and Speed. They

have weak pulldowns.

2, 3

MODE0,

MODE1

Open drain output of the data on BUS. A recessive bus = a logic [1], a

dominant bus = logic [0]. An external pullup is required.

RXD

No internal connection to these Pins. Pin 13 can be connected to GND

to allow the use of the 14-terminal or 8-terminal device. ⁽¹⁾

6, 13

–

Provides a battery-level logic signal.

–

CNTL

Control

Battery

Power input. An external diode is needed for reverse battery

protection.

VBATT

The external bus load resistor connects here to prevent bus pullup in

the event of loss of module ground.

LOAD

BUS

Load

Bus

This terminal connects to the bus through external components.

Notes

1. Module boards can be planned for the 14-terminal package and still use the 8-terminal package.

33897/A/B/C/D/T

Analog Integrated Circuit Device Data

Freescale Semiconductor

1 2 3 456 7 8...21

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33897D	FREESCALE	Single Wire CAN Transceiver	获取价格
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