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307GI-03LFT PDF预览

307GI-03LFT

更新时间: 2024-01-12 04:33:40
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
14页 153K
描述
SERIALLY PROGRAMMABLE CLOCK SOURCE

307GI-03LFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.19
Samacsys Description:TSSOP 4.4 MM 0.65MM PITCHJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:5 mm
湿度敏感等级:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:270 MHz封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
主时钟/晶体标称频率:300 MHz认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Clock Generators
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

307GI-03LFT 数据手册

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DATASHEET  
SERIALLY PROGRAMMABLE CLOCK SOURCE  
ICS307-03  
Description  
Features  
The ICS307-03 is a dynamic, serially programmable clock  
source which is flexible and takes up minimal board space.  
Output frequencies are programmed via a 3-wire SPI port.  
Crystal or clock reference input  
3.3 V CMOS outputs  
Three outputs can be individually configured or shut off  
An advanced PLL coupled to an array of configurable  
output dividers and three outputs allows low-jitter  
generation of frequencies from 200 Hz to 270 MHz.  
Small 16-pin TSSOP package – Pb-free, RoHS  
compliant  
Reprogrammable during operation  
3-wire SPI serial interface  
The device can be reprogrammed during operation, making  
it ideal for applications where many different frequencies  
are required, or where the output frequency must be  
determined at run time. Glitch-free frequency transitions,  
where the clock period changes slightly over many cycles,  
are possible.  
Glitch-free output frequency switching  
User selectable charge pump current and damping  
resistor  
Power-down control via hardware pin or software control  
bit  
Programming word can be generated by IDT VersaClock  
II Software  
Directly programmable via VersaClock II Software and a  
Windows PC parallel port  
Industrial temperature range available  
Block Diagram  
Charge Pump  
(Table 3)  
(Table 1)  
Resistor  
(Table 4)  
REF Divide  
CP  
300  
pF  
Divider  
2 - 8232  
CLK1  
11pF  
X1  
X2  
1-2055  
[Bit 110]  
[Bit 122]  
(Table 5)  
VCO DIVIDE  
12-2055  
(Table 2)  
1
0
Divider  
2 - 34  
CLK2  
CLK3  
[Bit 111]  
[Bit 129]  
DIN  
CS  
[Bit 123]  
(Table 6)  
Programming  
Register  
(132 bits)  
SCLK  
1
0
Divider  
2 - 34  
[Bit 124]  
(Table 7)  
IDT® SERIALLY PROGRAMMABLE CLOCK SOURCE  
1
ICS307-03  
REV L 032911  

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