5秒后页面跳转
2N3955 PDF预览

2N3955

更新时间: 2024-02-28 02:48:50
品牌 Logo 应用领域
INTERFET 晶体晶体管场效应晶体管
页数 文件大小 规格书
1页 69K
描述
N-Channel Dual Silicon Junction Field-Effect Transistor

2N3955 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:,Reach Compliance Code:unknown
风险等级:5.83Is Samacsys:N
FET 技术:JUNCTIONJESD-609代码:e0
最高工作温度:200 °C极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):0.25 W子类别:FET General Purpose Small Signal
表面贴装:NO端子面层:Tin/Lead (Sn/Pb)
Base Number Matches:1

2N3955 数据手册

  
01/99  
B-5  
2N3954, 2N3955, 2N3956  
N-Channel Dual Silicon Junction Field-Effect Transistor  
Absolute maximum ratings at T = 25¡C  
¥ Low and Medium Frequency  
Differential Amplifiers  
¥ High Input Impedance  
Amplifiers  
A
Reverse Gate Source & Reverse Gate Drain Voltage  
– 50 V  
50 mA  
250 mW  
500 mW  
4.3 mW/°C  
Gate Current  
Total Device Power Dissipation (each side)  
@ 85°C Case Temperature (both sides)  
Power Derating (both sides)  
2N3954  
2N3955  
2N3956  
Process NJ16  
Test Conditions  
At 25°C free air temperature:  
Static Electrical Characteristics  
Min Max Min Max Min Max Unit  
Gate Source Breakdown Voltage  
V
– 50  
– 50  
– 50  
V
– 100 pA  
– 500 nA  
I = – 1µA, V = ØV  
G DS  
(BR)GSS  
– 100  
– 500  
– 50  
– 100  
– 500  
– 50  
V
= – 30V, V = ØV  
DS  
GS  
Gate Reverse Current  
I
GSS  
V
= – 30V, V = ØV  
DS  
T = 125°C  
A
GS  
– 50  
pA  
V
= 20V, I = 200 µA  
D
DS  
Gate Operating Current  
Gate Source Voltage  
I
G
– 250  
– 4.2  
– 250  
– 4.2  
– 250 nA  
V
= 20V, I = 200 µA  
D
T = 125°C  
A
DS  
– 4.2  
V
V
V
= 20V, I = 50 µA  
D
DS  
V
GS  
– 0.5 – 4 – 0.5 – 4 – 0.5 – 4  
– 1 – 4.5 – 1 – 4.5 – 1 – 4.5  
V
= 20V, I = 200 µA  
D
DS  
Gate Source Cutoff Voltage  
V
V
V = – 20V, I = 1 nA  
DS G  
GS(OFF)  
Gate Source Forward Voltage  
Drain Saturation Current (Pulsed)  
V
2
5
2
5
2
5
V
V
= ØV, I = 1 mA  
GS(F)  
DS G  
I
0.5  
0.5  
0.5  
mA  
V
= 20V, V = ØV  
DSS  
DS GS  
Dynamic Electrical Characteristics  
1000 3000 1000 3000 1000 3000 µS  
V
= 20V, V = ØV  
GS  
f = 1 kHz  
Common Source Forward  
Transconductance  
DS  
g
g
fs  
1000  
1000  
1000  
µS  
µS  
pF  
pF  
V
= 20V, V = ØV  
GS  
f = 200 MHz  
f = 1 kHz  
DS  
Common Source Output Capacitance  
Common Source Input Capacitance  
Drain Gate Capacitance  
35  
4
35  
4
35  
4
V = 20V, V = ØV  
DS GS  
os  
C
V
= 20V, V = ØV  
f = 1 MHz  
f = 1 MHz  
iss  
DS GS  
C
1.5  
1.5  
1.5  
V
= 10V, I = ØA  
dgo  
dg S  
Common Source Reverse  
Transfer Capacitance  
C
1.2  
0.5  
1.2  
0.5  
1.2  
0.5  
pF  
V
= 20V, V = ØV  
f = 1 MHz  
f = 100 Hz  
rss  
DS GS  
V
= 20V, V = ØV,  
GS  
DS  
Noise Figure  
NF  
dB  
nA  
R = 10 MΩ  
g
Differential Gate Current  
| I – I  
|
10  
1
10  
1
10  
1
V
= 20V, I = 200µA  
T = 125°C  
A
G1  
G2  
DS  
D
Saturation Drain Current Ratio  
Differential Gate Source Voltage  
I
/I  
0.95  
0.97  
0.95  
0.97  
0.95  
0.97  
V = 20V, V = ØV  
DS GS  
DSS1 DSS2  
| V – V  
|
5
10  
15  
mV  
V
= 20V, I = 200µA  
D
GS1  
GS2  
DS  
T = 25°C  
A
0.8  
2
4
mV/°C  
V
= 20V, I = 200µA  
D
DS  
V – V  
to = – 55°C  
Differential Gate Source Voltage  
with Temperature  
GS1  
GS2  
T  
T = 25°C  
A
1
1
2.5  
1
5
1
mV/°C  
V
= 20V, I = 200µA  
D
DS  
to = +125°C  
f = 1 kHz  
Transconductance Ratio  
g
/g  
V
= 20V, I = 200µA  
fs1 fs2  
DS D  
TOÐ71 Package  
See Section G for Outline Dimensions  
Pin Configuration  
1 Source, 2 Drain, 3 Gate,  
5 Source, 6 Drain, 7 Gate  
1000 N. Shiloh Road, Garland, TX 75042  
(972) 487-1287 FAX (972) 276-3375  
www.interfet.com  

与2N3955相关器件

型号 品牌 描述 获取价格 数据表
2N3955(8PDIP) MICROSS Transistor

获取价格

2N3955(8SOIC) MICROSS Transistor

获取价格

2N3955_SOIC MICROSS a Low Noise, Low Drift, Monolithic Dual N-Channel JFET

获取价格

2N3955_TO-71 MICROSS a Low Noise, Low Drift, Monolithic Dual N-Channel JFET

获取价格

2N3955_TO-78 MICROSS a Low Noise, Low Drift, Monolithic Dual N-Channel JFET

获取价格

2N3955A ETC TRANSISTOR | JFET | N-CHANNEL | DUAL | 50V V(BR)DSS | 5MA I(DSS) | TO-71

获取价格