EiceDRIVER™ 2EDi product family
2EDSx reinforced, 2EDFx functional isolated 4A/8A, 1A/2A gate drivers
Functional description
3.2.1
Typical applications by isolation type
Isolated gate drivers are typically deployed in the following applications.
Table 3
Isolation type Potential applications
•
High-power hard-switching high-voltage PFC, Vienna Rectifier, Totem Pole PFC or
Synchronous Rectification
Driving switches with Kelvin source connection (4-pin package)
Secondary-side control in low voltage isolated DC/DC topologies and brick converters
Secondary-side control of high voltage SJ-MOSFETs in LLC or PS-ZVS
Primary-side controlled synchronous rectification
1 A / 2 A PWM data- / signal-coupler for local boost gate drivers
Functional
Reinforced
3.3
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•
•
•
•
Supply voltages
Three different power domains with independent internal power management are utilized to supply the input
chip and the two output drivers. An undervoltage lockout functionality (UVLO) in each domain enables a defined
startup and ensures a robust operation under all conditions.
3.3.1
Input-side power supply
The input side is powered via VDDI with nominal 3.3 V. For using the device with a supply voltage > 3.5 V the on-
chip switched low-dropout regulator (SLDO) must be activated and an external shunt resistor RVDDI has to be
connected to VDDI.
It is recommended to use a ceramic bypass capacitor (10 nF - 22 nF) between VDDI and GNDI.
The SLDO is activated if the pin SLDON is connected to GNDI. A hard-wired connection is recommended.
The SLDO regulates the current through an external resistor RVDDI connected between the external supply voltage
V
DD and pin VDDI as depicted in Figure 1 to generate the required voltage drop. For proper operation it has to be
ensured that the current through RVDDI always exceeds the maximum supply current IVDD of the input chip (see
Figure 7).
Thus, RVDDI has to fulfill:
R
VDDI < (VDD - 3.3) / IVDD, max
A typical choice for VDD = 12 V is RVDDI = 3 kΩ, resulting in sufficient margin between resistor current and VDDI
operating current. Dynamic current peaks are eliminated by a blocking cap (10 to 22 nF) between VDDI and GNDI.
The total power consumption of 2EDi is dominated by the output side and depends on switching frequency, gate
resistor and gate charge, while for typical switching frequencies the input supply current stays relatively constant
(see Figure 6 to Figure 7).
3.3.2
Output-side power supply
Each gate driver channel has to be powered separately. It is recommended to use a ceramic bypass capacitor
(minimum value 20 x Ciss of MOSFET) from VDDA to GNDA and from VDDB to GNDB in close proximity to the
device.
The operating supply voltage can range from 4.5 V to 20 V for each gate drive channel.
The minimum gate driver turn-on voltage is set by the device Undervoltage Lockout (UVLO) to protect the power
MOSFETs from operating in the saturation region.
Devices with 4 V, 8 V and 13 V UVLO thresholds for the output supply are currently available (see Chapter 1.1.)
Final datasheet
9
Rev.2.8
2022-08-08