28F200BL-T/B, 28F002BL-T/B
Program and Erase Automation allow program
and erase operations to be executed using a two-
write command sequence to the CUI. The internal
Write State Machine (WSM) automatically executes
the algorithms and timings necessary for program
and erase operations, including verifications, there-
by unburdening the microprocessor or microcontrol-
ler. Writing of memory data is performed in word or
byte increments for the 28F200BL family and in byte
increments for the 28F002BL family typically within
11 ms.
mal read mode upon activation of the Reset pin.
When the CPU enters reset mode, it expects to read
the contents of a memory location. Furthermore,
with on-chip program/erase automation in the
Ý
2-Mbit family and the RP functionality for data pro-
tection, after the CPU is reset and even if a program
or erase command is issued, the device will not rec-
Ý
ognize any operation until RP returns to its normal
state.
For the 28F200BL, Byte-wide or Word-wide In-
put/Output Control is possible by controlling the
Ý
Ý
The Status Register (SR) indicates the status of the
WSM and whether the WSM successfully completed
the desired program or erase operation.
BYTE pin. When the BYTE pin is at a logic low
the device is in the byte-wide mode (x8) and data is
[
]
read and written through DQ 0:7 . During the byte-
wide mode, DQ 8:14 are tri-stated and DQ /A
becomes the lowest order address pin. When the
Ý
BYTE pin is at a logic high the device is in the
word-wide mode (x16) and data is read and written
]
through DQ 0:15 .
[
]
b
15
1
Maximum Access Time of 150 ns (t
over the commercial temperature range (0 C to
) is achieved
§
ACC
a
3.6V, 4.5V to 5.5V) and 50 pF output load.
70 C), over V
supply voltage range (3.0V to
§
CC
[
I
Program current is 40 mA for x16 operation
and 30 mA for x8 operation. I Erase current is
PP
1.3 Applications
PP
erase and programming
30 mA maximum. V
PP
voltage is 11.4V to 12.6V (V
der all operating conditions.
e
The 2-Mbit low power boot block flash memory fami-
ly combines high density, 3V operation, high per-
formance, cost-effective flash memories with block-
ing and hardware protection capabilities. Its flexibility
and versatility will reduce costs throughout the prod-
uct life cycle. Flash memory is ideal for Just-In-Time
production flow, reducing system inventory and
costs, and eliminating component handling during
the production phase. During the product life cycle,
when code updates or feature enhancements be-
come necessary, flash memory will reduce the up-
date costs by allowing either a user-performed code
change via floppy disk or a remote code change via
a serial link. The 2-Mbit boot block flash memory
family provides full function, blocked flash memories
suitable for a wide range of applications. These ap-
plications include Extended PC BIOS, Handy Digi-
tal Cellular Phone program and data storage and
various other portable embedded applications where
both program and data storage are required.
g
12V 5%) un-
PP
Typical I Active Current of 15 mA is achieved
CC
for the x16 products and the x8 products.
The 2-Mbit flash family is also designed with an Au-
tomatic Power Savings (APS) feature to minimize
system battery current drain and allow for extremely
low power designs. Once the device is accessed to
read the array data, APS mode will immediately put
the memory in static mode of operation where I
CC
active current is typically 0.8 mA until the next read
is initiated.
Ý
Ý
When the CE and RP pins are at V
BYTE pin (28F200BL-only) is at either V or GND
and the
CC
Ý
CC
the CMOS Standby mode is enabled where I
typically 40 mA.
is
CC
A Deep Power-down Mode is enabled when the
Reprogrammable systems such as Notebook and
Palmtop computers, are ideal applications for the
2-Mbit low power flash products. Portable and han-
dheld personal computer applications are becoming
more complex with the addition of power manage-
ment software to take advantage of the latest micro-
processor technology, the availability of ROM-based
application software, pen tablet code for electronic
handwriting, and diagnostic code. Figure 1 shows an
example of a 28F200BL-T application.
Ý
RP pin is at ground minimizing power consumption
and providing write protection during power-up con-
ditions. I
current during deep power-down mode
CC
is 0.20 mA typical. An initial maximum access time
Ý
or Reset Time of 600 ns is required from RP
switching until outputs are valid. Equivalently, the
device has a maximum wake-up time of 1 ms until
writes to the Command User Interface are recog-
Ý
nized. When RP is at ground the WSM is reset, the
Status Register is cleared and the entire device is
protected from being written to. This feature pre-
vents data corruption and protects the code stored
in the device during system reset. The system Reset
This increase in software sophistication augments
the probability that a code update will be required
after the PC is shipped. The 2-Mbit low power flash
memory products provide an inexpensive update so-
Ý
pin can be tied to RP to reset the memory to nor-
4
5秒后页面跳转
MAX6675资料手册参数详解、引脚配置说明
LM258引脚图及功能介绍、主要参数分析
CD4052资料手册参数详解、引脚配置说明
一文带你了解TPS5430资料手册分析：参数介绍、引脚配置说明
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
