23S08-1HDCG8

更新时间： 2024-02-18 05:38:29

品牌	Logo	应用领域
艾迪悌 - IDT		时钟
页数	文件大小	规格书
10页	72K
描述
3.3V ZERO DELAY CLOCK MULTIPLIER, SPREAD SPECTRUM COMPATIBLE

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数据手册

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23S08-1HDCG8 数据手册

IDT23S08

3.3VZERODELAYCLOCKMULTIPLIER

COMMERCIALANDINDUSTRIALTEMPERATURERANGES

FUNCTION TABLE⁽¹⁾SELECTINPUTDECODING

CLK A

Tri-State

Driven

CLK B

Tri-State

Driven

Output Source

PLL Shut Down

PLL

REF

PLL

Driven

NOTE:

1. H = HIGH Voltage Level

L = LOW Voltage Level

AVAILABLEOPTIONSFORIDT23S08

Device

FeedbackFrom

Bank A or Bank B

Bank A

BankAFrequency

BankBFrequency

IDT23S08-1

Reference

Reference/2

Reference

Reference/2

Reference

IDT23S08-1H

IDT23S08-2

Reference

IDT23S08-2

Bank B

2xReference

Reference

IDT23S08-2H⁽¹⁾

IDT23S08-3⁽¹⁾

IDT23S08-4

Bank A

Bank B

2xReference

4xReference

2xReference

Reference/2

(2)

Bank A

ReferenceorReference

2 x Reference

Bank B

Bank A or Bank B

2 x Reference

IDT23S08-5H

Reference/2

NOTES:

1. Contact factory for availability.

2. Output phase is indeterminant (0° or 180° from input clock).

SPREADSPECTRUMCOMPATIBLE

Many systems being designed now use a technology called Spread Spectrum Frequency Timing Generation. This product is designed not to filter

offtheSpreadSpectrumfeatureofthereferenceinput, assumingitexists. WhenazerodelaybufferisnotdesignedtopasstheSpreadSpectrumfeature

through, the result is a significant amount of tracking skew, which may cause problems in systems requiring synchronization.

1 234 5 6 7...10

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