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1800PT20D0 PDF预览

1800PT20D0

更新时间: 2022-02-26 10:13:50
品牌 Logo 应用领域
尼尔 - NELLSEMI /
页数 文件大小 规格书
6页 669K
描述
Phase Control Thyristors

1800PT20D0 数据手册

 浏览型号1800PT20D0的Datasheet PDF文件第1页浏览型号1800PT20D0的Datasheet PDF文件第3页浏览型号1800PT20D0的Datasheet PDF文件第4页浏览型号1800PT20D0的Datasheet PDF文件第5页浏览型号1800PT20D0的Datasheet PDF文件第6页 
RoHS  
1800PT Series  
Nell High Power Products  
FORWARD CONDUCTION  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
VALUES  
1800(720)  
55(85)  
UNIT  
A
ºC  
A
Maximum average current  
at heatsink temperature  
180° conduction, half sine wave  
IT(AV)  
double side (single side) cooled  
IT(RMS)  
DC at 25°C heatsink temperature double side cooled  
Maximum RMS on-state current  
3300  
35000  
36645  
29400  
30782  
6125  
5573  
4322  
3932  
61250  
0.90  
t = 10ms  
No voltage  
reapplied  
t = 8.3ms  
Maximum peak, one cycle  
non-reptitive surge current  
ITSM  
A
t = 10ms  
100%VRRM  
reapplied  
t = 8.3ms  
Sinusoidal half wave,  
initial TJ = TJ maximum  
t = 10ms  
No voltage  
reapplied  
t = 8.3ms  
2
kA s  
Maximum l²t for fusing  
2
I t  
t = 10ms  
100%VRRM  
reapplied  
t = 8.3ms  
2
kA s  
2
I t  
t = 0.1 to 10 ms, no voltage reapplied  
Maximum l²t for fusing  
V
(16.7% x π x lT(AV) < I < π x lT(AV)),TJ=TJ maximum  
(I > π x lT(AV)),TJ =TJ maximum  
(16.7% x π x lT(AV) < I < π x lT(AV)),TJ=TJ maximum  
(I > π x lT(AV)),TJ=TJ maximum  
Low level value of threshold voltage  
High level value of threshold voltage  
Low level value on-state slope resistance  
High level value on-state slope resistance  
Maximum on-state voltage  
T(TO)1  
V
V
T(TO)2  
1.00  
rt1  
rt2  
VTM  
lH  
0.17  
mΩ  
0.16  
lpk =4000A,TJ=TJ maximum, tp=10 ms sine pulse  
1.60  
V
Maximum holding current  
300  
TJ = 25°C, anode supply 12V resistive load  
mA  
Typical latching current  
lL  
500  
SWITCHING  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
VALUES  
UNIT  
Gate drive 20V, 20Ω, tr ≤ 1µs  
Maximum non-repetitive rate of rise  
of turned-on current  
A/µs  
dl/dt  
1000  
TJ =TJ maximum, anode voltage ≤ 80% VDRM  
Gate current 1A, dlg/dt =1 A/µs  
Vd = 0.67 VDRM, TJ = 25°C  
Typical delay time  
td  
1.90  
µs  
lTM = 550A, TJ =TJ maximum, dl/dt = 40A/µs.  
tq  
Typical turn-off time  
200  
VR = 50V, dV/dt = 20 V/µs, gate 0 V 100Ω, tp = 500µs  
BLOCKING  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
VALUES  
UNIT  
Maximum critical rate of rise of  
off-state voltage  
TJ =TJ maximum linear to 80% rated VDRM  
V/µs  
dV/dt  
500  
Maximum peak reverse and  
off-state leakage current  
lRRM,  
lDRM,  
TJ =TJ maximum, rated VDRM/VRRM applied  
100  
mA  
Page 2 of 6  
www.nellsemi.com  

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