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100390PC PDF预览

100390PC

更新时间: 2024-02-14 19:42:21
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 转换器锁存器接口集成电路光电二极管
页数 文件大小 规格书
8页 99K
描述
Low Power Single Supply Hex PECL-to-TTL Translator

100390PC 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.300 INCH, MS-013, SOIC-24
针数:24Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.65最大延迟:6.6 ns
接口集成电路类型:PECL TO TTL TRANSLATORJESD-30 代码:R-PDSO-G24
JESD-609代码:e3长度:15.4 mm
湿度敏感等级:1位数:1
功能数量:6端子数量:24
最高工作温度:85 °C最低工作温度:
输出特性:3-STATE输出锁存器或寄存器:NONE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP24,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Level Translators最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:YES技术:ECL
温度等级:OTHER端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.5 mmBase Number Matches:1

100390PC 数据手册

 浏览型号100390PC的Datasheet PDF文件第2页浏览型号100390PC的Datasheet PDF文件第3页浏览型号100390PC的Datasheet PDF文件第4页浏览型号100390PC的Datasheet PDF文件第5页浏览型号100390PC的Datasheet PDF文件第7页浏览型号100390PC的Datasheet PDF文件第8页 
Application Notes  
1. Device performance will be enhanced by the use of  
4. Undefined output states can occur for some invalid  
combinations. See Truth Table. This should be avoided  
to prevent possible oscillation or increased power con-  
sumption due to TTL outputs biased into a quasi state  
with both pullup and pulldown stages partially on.  
3-STATEing the outputs will counteract the effects of  
invalid input states.  
dual VCC power planes as illustrated in the Application  
Figures 4, 5. This will minimize the coupling of TTL  
switching noise into the primary reference to the ECL  
circuitry and take full advantage of the 100390s on  
chip VCC partitioning.  
2. The devices partitioned VCC may be operated from two  
5. Pins 8, 15, and 22 on the 28-pin PLCC package are  
tied to the chips substrate and are named GNDs.  
These pins are electrically common to the ground pins  
1, 2, and 28. For best thermal performance, tie the  
GND pins to the circuit ground plane. They may be tied  
to an electrically isolated thermal dissipation plane or  
may float.  
5V, 5% tolerance, supplies provided that they are  
ramped up/down together so that the max differential is  
1V. This is to prevent overstress to internal ESD  
diodes. If the ECL driver to the F390 is powered from a  
separate supply, it must obey this sequence rule also.  
3. Glitch-free power up, independent of Data input levels,  
is achieved if TTL logic HIGH is held on the Output  
Enable pin during ramping up/down of the VCC supply.  
6. Figure 4 illustrates typical differential input operation.  
7. Figure 5 illustrates typical single-ended input operation.  
FIGURE 4.  
FIGURE 5.  
www.fairchildsemi.com  
6

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