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ZNBG4001Q16TA

更新时间： 2024-10-30 13:01:15
品牌 Logo 应用领域
捷特科 - ZETEX 模拟IC信号电路光电二极管控制器
页数 文件大小 规格书
10页 410K
描述
Analog Circuit, 1 Func, PDSO16, QSOP-16

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中文翻译

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ZNBG4001Q16TA 技术参数

是否Rohs认证： 符合生命周期：Transferred
包装说明：SSOP,Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.05
模拟集成电路 - 其他类型：ANALOG CIRCUITJESD-30 代码：R-PDSO-G16
JESD-609代码：e3长度：4.9 mm
湿度敏感等级：1功能数量：1
端子数量：16最高工作温度：70 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：260
认证状态：Not Qualified座面最大高度：1.75 mm
最大供电电压 (Vsup)：12 V最小供电电压 (Vsup)：5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
温度等级：OTHER端子面层：MATTE TIN
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUAL处于峰值回流温度下的最长时间：40
宽度：3.9116 mmBase Number Matches：1

ZNBG4001Q16TA 数据手册

 浏览型号ZNBG4001Q16TA的Datasheet PDF文件第2页浏览型号ZNBG4001Q16TA的Datasheet PDF文件第3页浏览型号ZNBG4001Q16TA的Datasheet PDF文件第4页浏览型号ZNBG4001Q16TA的Datasheet PDF文件第5页浏览型号ZNBG4001Q16TA的Datasheet PDF文件第6页浏览型号ZNBG4001Q16TA的Datasheet PDF文件第7页 
ZNBG4000 ZNBG4001  
ZNBG6000 ZNBG6001  
FET BIAS CONTROLLER  
ISSUE 2 - JUNE 1998  
DEVICE DESCRIPTION  
The ZNBG series of devices are designed to  
meet the bias requirements of GaAs and  
HEMT FETs commonly used in satellite  
receiver LNBs, PMR, cellular telephones etc.  
with a minimum of external components.  
These devices are unconditionally stable  
over the full working temperature with the  
FETs in place, subject to the inclusion of the  
recommended gate and drain capacitors.  
These ensure RF stability and minimal  
injected noise.  
With the addition of two capacitors and  
resistors the devices provide drain voltage  
and current control for a number of external  
grounded source FETs, generating the  
regulated negative rail required for FET gate  
biasing whilst operating from a single  
supply. This negative bias, at -3 volts, can  
also be used to supply other external  
circuits.  
It is possible to use less than the devices full  
complement of FET bias controls, unused  
drain and gate connections can be left open  
circuit without affecting operation of the  
remaining bias circuits.  
In order to protect the external FETs the  
circuits have been designed to ensure that,  
under any conditions including power  
up/down transients, the gate drive from the  
bias circuits cannot exceed the range -3.5V  
to 0.7V. Furthermore if the negative rail  
experiences a fault condition, such as  
overload or short circuit, the drain supply to  
the FETs will shut down avoiding excessive  
current flow.  
The ZNBG4000/1 and ZNBG6000/1 contain  
four and six bias stages respectively. In  
setting drain current the ZNBG4000/1 two  
resistors allows individual FET pair control  
to different levels, the ZNBG6000/1 two  
resistors split control between two and four  
FETs. This allows the operating current of  
input FETs to be adjusted to minimise noise,  
whilst the following FET stages can  
separately be adjusted for maximum gain.  
The series also offers the choice of drain  
voltage to be set for the FETs, the  
ZNBG4000/6000 gives 2.2 volts drain whilst  
the ZNBG4001/6001 gives 2 volts.  
The ZNBG4000/1 and ZNBG6000/1 are  
available in QSOP16 and 20 pin packages  
respectively for the minimumindevicessize.  
Device operating temperature is -40 to 70°C  
to suit a wide range of environmental  
conditions.  
FEATURES  
APPLICATIONS  
Provides bias for GaAs and HEMT FETs  
Satellite receiver LNBs  
•
•
Drives up to four or six FETs  
Private mobile radio (PMR)  
•
•
Dynamic FET protection  
Cellular telephones  
•
•
Drain current set by external resistor  
•
Regulated negative rail generator  
requires only 2 external capacitors  
•
Choice in drain voltage  
•
Wide supply voltage range  
•
QSOP surface mount package  
•
4-137  
1234567...10

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