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ZL50233QCC1 PDF预览

ZL50233QCC1

更新时间: 2024-02-12 08:03:12
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 综合业务数字网
页数 文件大小 规格书
38页 536K
描述
ISDN Echo Canceller, 1-Func, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, MS-026BED, LQFP-100

ZL50233QCC1 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:LFQFP,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.67
JESD-30 代码:S-PQFP-G100JESD-609代码:e3
长度:14 mm功能数量:1
端子数量:100最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.6 mm
标称供电电压:1.8 V表面贴装:YES
电信集成电路类型:ISDN ECHO CANCELLER温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:14 mm
Base Number Matches:1

ZL50233QCC1 数据手册

 浏览型号ZL50233QCC1的Datasheet PDF文件第2页浏览型号ZL50233QCC1的Datasheet PDF文件第3页浏览型号ZL50233QCC1的Datasheet PDF文件第4页浏览型号ZL50233QCC1的Datasheet PDF文件第5页浏览型号ZL50233QCC1的Datasheet PDF文件第6页浏览型号ZL50233QCC1的Datasheet PDF文件第7页 
ZL50233  
4 Channel Voice Echo Cancellor  
Data Sheet  
November 2004  
Features  
Independent multiple channels of echo  
Ordering Information  
cancellation; from 4 channels of 64 ms to 2  
channels of 128 ms with the ability to mix  
channels at 128 ms or 64 ms in any combination  
ZL50233/QCC 100 Pin LQFP Tray  
ZL50233/GDC 208 Ball LBGA Trays  
ZL50233QCC1 100 Pin LQFP* Trays  
*Pb Free Matte Tin  
Independent Power Down mode for each group of  
2 channels for power management  
-40°C to +85°C  
Fully compliant to ITU-T G.165, G.168 (2000) and  
(2002) specifications  
+9 dB to -12 dB level adjusters (3 dB steps) at all  
signal ports  
Passed AT&T voice quality testing for carrier  
grade echo cancellers.  
Offset nulling of all PCM channels  
10 MHz or 20 MHz master clock operation  
Compatible to ST-BUS and GCI interfaces with  
2 Mbps serial PCM data  
3.3 V I/O pads and 1.8 V Logic core operation with  
5 V tolerant inputs  
PCM coding, µ/A-Law ITU-T G.711 or sign  
magnitude  
IEEE-1149.1 (JTAG) Test Access Port  
ZL50232, ZL50233, ZL50234 and ZL50235 have  
same pinouts in both LQFP and LBGA packages  
Per channel Fax/Modem G.164 2100 Hz or G.165  
2100 Hz phase reversal Tone Disable  
Per channel echo canceller parameters control  
Transparent data transfer and mute  
Applications  
Voice over IP network gateways  
Voice over ATM, Frame Relay  
T1/E1/J1 multichannel echo cancellation  
Wireless base stations  
Fast reconvergence on echo path changes  
Fully programmable convergence speeds  
Patented Advanced Non-Linear Processor with  
high quality subjective performance  
Protection against narrow band signal divergence  
and instability in high echo environments  
Echo Canceller pools  
DCME, satellite and multiplexer system  
V
V
V
DD1 (3.3 V)  
DD2 (1.8 V)  
SS  
ODE  
Rin  
Sin  
Rout  
Parallel  
Serial  
to  
Parallel  
to  
Serial  
Echo Canceller Pool  
Sout  
Group 0  
ECA/ECB  
Group 1  
ECA/ECB  
MCLK  
Fsel  
Note:  
Refer to Figure 4  
for Echo Canceller  
block diagram  
PLL  
C4i  
F0i  
RESET  
Timing  
Unit  
Microprocessor Interface  
Test Port  
DS CS R/W A10-A0 DTA D7-D0 IRQ TMS TDI TDO TCK TRST  
Figure 1 - ZL50233 Device Overview  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 2003-2004, Zarlink Semiconductor Inc. All Rights Reserved.  

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