Datasheet > ZL50017_0611

ZL50017_0611

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
加拿大卓联 - ZARLINK		开关
页数	文件大小	规格书
51页	499K
描述
1 K Digital Switch

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

ZL50017_0611 数据手册

ZL50017

1 K Digital Switch

Data Sheet

November 2006

Features

•

1024 channel x 1024 channel non-blocking digital

Ordering Information

Time Division Multiplex (TDM) switch at 4.096,

8.192 or 16.384 Mbps

ZL50017GAC

ZL50017QCC

256 Ball PBGA

256 Lead LQFP

Trays

•

16 serial TDM input, 16 serial TDM output

ZL50017QCG1 256 Lead LQFP*

ZL50017GAG2 256 Ball PBGA**

*Pb Free Matte Tin

Trays, Bake &

Drypack

streams

Trays, Bake &

Output streams can be configured as bi-

directional for connection to backplanes

Drypack

**Pb Free Tin/Silver/Copper

Exceptional input clock cycle to cycle variation

tolerance (20 ns for all rates)

-40°C to +85°C

Per-stream input bit delay with flexible sampling

point selection

•

Supports ST-BUS and GCI-Bus standards for

input and output timing

IEEE-1149.1 (JTAG) test port

Per-stream output bit and fractional bit

•

advancement

3.3 V I/O with 5 V tolerant inputs; 1.8 V core

Per-channel constant or variable throughput

delay for frame integrity and low latency

applications

Per-channel high impedance output control

Per-channel message mode

Input clock: 4.096 MHz, 8.192 MHz, 16.384 MHz

Input frame pulses:61 ns, 122 ns, 244 ns

voltage

Applications

•

PBX and IP-PBX

Small and medium digital switching platforms

Remote access servers and concentrators

Wireless base stations and controllers

Multi service access platforms

Digital Loop Carriers

Control interface compatible with Intel and

Motorola 16-bit non-multiplexed buses

•

Connection memory block programming

Computer Telephony Integration

V_{DD_COREA}

V_{DD_IOA}

RESET

V_{DD_CORE}

V_{DD_IO}

V_SS

ODE

P/S Converter

STio[15:0]

TMS

S/P Converter

Input Timing

Data Memory

STi[15:0]

FPi

CKi

TDi

Connection Memory

MODE_4M0

MODE_4M1

TDo

TCK

TRST

Internal Registers &Microprocessor Interface

Figure 1 - ZL50017 Functional Block Diagram

Zarlink Semiconductor Inc.

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

12 3 4 5 6 7...51

下载PDF

与ZL50017_0611相关器件

型号	品牌	描述	获取价格	数据表
ZL50017GAC	ZARLINK	1 K Digital Switch	获取价格
ZL50017GAG2	ZARLINK	1 K Digital Switch	获取价格
ZL50017QCC	ZARLINK	1 K Digital Switch	获取价格
ZL50017QCG1	ZARLINK	1 K Digital Switch	获取价格
ZL50018	ZARLINK	2 K Digital Switch with Enhanced Stratum 3 DPLL	获取价格
ZL50018_06	ZARLINK	2 K Digital Switch with Enhanced Stratum 3 DPLL	获取价格