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ZL49031DCE1 PDF预览

ZL49031DCE1

更新时间： 2024-10-30 03:08:35
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 电信集成电路光电二极管
页数 文件大小 规格书
15页 424K
描述
Wide Dynamic Range DTMF Receiver

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中文翻译

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ZL49031DCE1 技术参数

是否Rohs认证： 符合生命周期：Transferred
包装说明：SOP, SOP18,.4Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.69
JESD-30 代码：R-PDSO-G18JESD-609代码：e3
长度：11.55 mm功能数量：1
端子数量：18最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP18,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
电源：5 V认证状态：Not Qualified
座面最大高度：2.65 mm子类别：Telecom Signaling Circuits
最大压摆率：0.008 mA标称供电电压：5 V
表面贴装：YES电信集成电路类型：DTMF SIGNALING CIRCUIT
温度等级：INDUSTRIAL端子面层：MATTE TIN
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL宽度：7.5 mm
Base Number Matches：1

ZL49031DCE1 数据手册

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ZL49010/11, ZL49020/21, ZL49030/31  
Wide Dynamic Range DTMF Receiver  
Data Sheet  
February 2007  
Features  
•
•
Wide dynamic range (50 dB) DTMF Receiver  
Ordering Information  
Call progress (CP) detection via cadence  
ZL49010/11DAA 8 Pin PDIP  
ZL49020/21DAA 8 Pin PDIP  
Tubes  
Tubes  
indication  
•
•
•
•
•
4-bit synchronous serial data output  
ZL49030/31DCA 18 Pin SOIC Tubes  
ZL49030/31DCB 18 Pin SOIC Tape & Reel  
ZL49030/31DDA 20 Pin SSOP Tubes  
ZL49030/31DDB 20 Pin SSOP Tape & Reel  
ZL49010/11DAA1 8 Pin PDIP* Tubes  
Software controlled guard time for ZL490x0  
Internal guard time circuitry for ZL490x1  
Powerdown option (ZL4901x & ZL4903x)  
ZL49020/21DAA1 8 Pin PDIP*  
Tubes  
3.579 MHz crystal or ceramic resonator (ZL4903x  
ZL49030/31DCE1 18 Pin SOIC* Tubes, Bake & Drypack  
ZL49030/31DCF1 18 Pin SOIC* Tape & Reel,  
Bake & Drypack  
and ZL4902x)  
•
•
External clock input (ZL4901x)  
ZL49030/31DDE1 20 Pin SSOP* Tubes, Bake & Drypack  
ZL49030/31DDF1 20 Pin SSOP* Tubes, Bake & Drypack  
Guarantees non-detection of spurious tones  
*Pb Free Matte Tin  
-40°C to +85°C  
Applications  
•
•
•
Integrated telephone answering machine  
End-to-end signalling  
Fax Machines  
signal and requires external software guard time to  
validate the DTMF digit. The ZL490x1, with preset  
internal guard times, uses a delay steering (DStD)  
logic output to indicate the detection of a valid DTMF  
digit. The 4-bit DTMF binary digit can be clocked out  
synchronously at the serial data (SD) output. The SD  
pin is multiplexed with call progress detector output. In  
the presence of supervisory tones, the call progress  
detector circuit indicates the cadence (i.e., envelope)  
of the tone burst. The cadence information can then be  
processed by an external microcontroller to identify  
Description  
The ZL490xx is a family of high performance DTMF  
receivers which decode all 16 tone pairs into a 4-bit  
binary code. These devices incorporate an AGC for  
wide dynamic range and are suitable for end-to-end  
signalling. The ZL490x0 provides an early steering  
(ESt) logic output to indicate the detection of a DTMF  
PWDN 1  
Steering  
Digital  
Circuit  
ESt  
or  
DStD  
VDD  
Guard  
Voltage  
Time3  
Bias Circuit  
High  
Group  
Filter  
VSS  
Parallel to  
Serial  
Converter  
& Latch  
ACK  
Dial  
Tone  
Filter  
Anti-  
alias  
Filter  
Code  
Converter  
and  
Digital  
AGC  
Detector  
Algorithm  
Latch  
Low  
Group  
Filter  
Mux  
SD  
OSC22  
Oscillator  
and  
Clock  
Circuit  
Energy  
Detection  
OSC1  
(CLK)  
To All Chip Clocks  
1. ZL49010/1 and ZL49030/1 only.  
2. ZL49020/1 and ZL49030/1 only.  
3. ZL490x1 only.  
Figure 1 - Functional Block Diagram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 2003-2007, Zarlink Semiconductor Inc. All Rights Reserved.  
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