Datasheet > ZL49030DDF1

ZL49030DDF1

更新时间： 2024-12-01 03:08:35

品牌	Logo	应用领域
加拿大卓联 - ZARLINK		/
页数	文件大小	规格书
15页	424K
描述
Wide Dynamic Range DTMF Receiver

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数据手册

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ZL49030DDF1 数据手册

ZL49010/11, ZL49020/21, ZL49030/31

Wide Dynamic Range DTMF Receiver

Data Sheet

February 2007

Features

•

Wide dynamic range (50 dB) DTMF Receiver

Ordering Information

Call progress (CP) detection via cadence

ZL49010/11DAA 8 Pin PDIP

ZL49020/21DAA 8 Pin PDIP

Tubes

indication

•

4-bit synchronous serial data output

ZL49030/31DCA 18 Pin SOIC Tubes

ZL49030/31DCB 18 Pin SOIC Tape & Reel

ZL49030/31DDA 20 Pin SSOP Tubes

ZL49030/31DDB 20 Pin SSOP Tape & Reel

ZL49010/11DAA1 8 Pin PDIP* Tubes

Software controlled guard time for ZL490x0

Internal guard time circuitry for ZL490x1

Powerdown option (ZL4901x & ZL4903x)

ZL49020/21DAA1 8 Pin PDIP*

Tubes

3.579 MHz crystal or ceramic resonator (ZL4903x

ZL49030/31DCE1 18 Pin SOIC* Tubes, Bake & Drypack

ZL49030/31DCF1 18 Pin SOIC* Tape & Reel,

Bake & Drypack

and ZL4902x)

•

External clock input (ZL4901x)

ZL49030/31DDE1 20 Pin SSOP* Tubes, Bake & Drypack

ZL49030/31DDF1 20 Pin SSOP* Tubes, Bake & Drypack

Guarantees non-detection of spurious tones

*Pb Free Matte Tin

-40°C to +85°C

Applications

•

Integrated telephone answering machine

End-to-end signalling

Fax Machines

signal and requires external software guard time to

validate the DTMF digit. The ZL490x1, with preset

internal guard times, uses a delay steering (DStD)

logic output to indicate the detection of a valid DTMF

digit. The 4-bit DTMF binary digit can be clocked out

synchronously at the serial data (SD) output. The SD

pin is multiplexed with call progress detector output. In

the presence of supervisory tones, the call progress

detector circuit indicates the cadence (i.e., envelope)

of the tone burst. The cadence information can then be

processed by an external microcontroller to identify

Description

The ZL490xx is a family of high performance DTMF

receivers which decode all 16 tone pairs into a 4-bit

binary code. These devices incorporate an AGC for

wide dynamic range and are suitable for end-to-end

signalling. The ZL490x0 provides an early steering

(ESt) logic output to indicate the detection of a DTMF

PWDN ¹

Steering

Digital

Circuit

ESt

DStD

VDD

Guard

Voltage

Time³

Bias Circuit

High

Group

Filter

VSS

Parallel to

Serial

Converter

& Latch

ACK

Dial

Tone

Filter

Anti-

alias

Filter

Code

Converter

and

Digital

AGC

Detector

Algorithm

Latch

Low

Group

Filter

Mux

OSC2²

Oscillator

and

Clock

Circuit

Energy

Detection

OSC1

(CLK)

To All Chip Clocks

1. ZL49010/1 and ZL49030/1 only.

2. ZL49020/1 and ZL49030/1 only.

3. ZL490x1 only.

Figure 1 - Functional Block Diagram

Zarlink Semiconductor Inc.

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

12 3 4 5 6 7...15

中文翻译

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与ZL49030DDF1相关器件

型号	品牌	获取价格	描述	数据表
ZL49031	ZARLINK	获取价格	Wide Dynamic Range DTMF Receiver
ZL49031DCA	ZARLINK	获取价格	Wide Dynamic Range DTMF Receiver
ZL49031DCA	MICROSEMI	获取价格	DTMF Signaling Circuit, PDSO18,
ZL49031DCB	ZARLINK	获取价格	Wide Dynamic Range DTMF Receiver
ZL49031DCB	MICROSEMI	获取价格	DTMF Signaling Circuit, PDSO18,
ZL49031DCE1	ZARLINK	获取价格	Wide Dynamic Range DTMF Receiver
ZL49031DCF1	ZARLINK	获取价格	Wide Dynamic Range DTMF Receiver
ZL49031DDA	ZARLINK	获取价格	Wide Dynamic Range DTMF Receiver
ZL49031DDA	MICROSEMI	获取价格	DTMF Signaling Circuit, PDSO20,
ZL49031DDB	ZARLINK	获取价格	Wide Dynamic Range DTMF Receiver

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