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ZL40815DCE PDF预览

ZL40815DCE

更新时间: 2024-11-30 07:44:43
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 预分频器多谐振动器逻辑集成电路光电二极管时钟
页数 文件大小 规格书
14页 519K
描述
10GHz Fixed Modulus DIVIDE 4

ZL40815DCE 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:HLSOP, SOP8,.25Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.54
Is Samacsys:N系列:4000/14000/40000
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
长度:4.89 mm逻辑集成电路类型:PRESCALER
最大频率@ Nom-Sup:11000000000 Hz数据/时钟输入次数:2
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:UNBUFFERED ECL输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:HLSOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, LOW PROFILE峰值回流温度(摄氏度):240
电源:5 V最大电源电流(ICC):156 mA
认证状态:Not Qualified座面最大高度:1.68 mm
子类别:Prescaler/Multivibrators最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
最小 fmax:11000 MHzBase Number Matches:1

ZL40815DCE 数据手册

 浏览型号ZL40815DCE的Datasheet PDF文件第2页浏览型号ZL40815DCE的Datasheet PDF文件第3页浏览型号ZL40815DCE的Datasheet PDF文件第4页浏览型号ZL40815DCE的Datasheet PDF文件第5页浏览型号ZL40815DCE的Datasheet PDF文件第6页浏览型号ZL40815DCE的Datasheet PDF文件第7页 
ZL40815  
10GHz Fixed Modulus ÷ 4  
Data Sheet  
March 2006  
Features  
Very High Operating Speed  
Operation down to DC with Square Wave Input  
Low Phase Noise (Typically better than  
-146 dBc/Hz at 10 kHz)  
5 V Single Supply Operation  
Low Power Dissipation: 510 mW (Typ)  
Surface Mount Plastic Package With Exposed  
Pad (See Application Notes)  
Ordering Information  
ZL40815DCE  
ZL40815DCF  
8 Pin SOP/SOIC  
8 Pin SOP/SOIC  
Tubes, Bake & Drypack  
Tape & Reel,  
Bake & Drypack  
ZL40815DCF1 8 Pin SOP/SOIC* Tape & Reel,  
Bake & Drypack  
ZL40815DCE1 8 Pin SOP/SOIC* Tubes, Bake & Drypack  
*Pb Free Matte Tin  
-40°C to +85°C  
Description  
Applications  
The ZL40815 is one of a range of 5 V supply, very high  
speed, low power prescalers for professional  
applications with a fixed modulus of divide by 4. The  
dividing elements are static D type flip flops, and  
therefore, allow operation down to DC if the drive signal  
is a pulse waveform with fast risetimes. The output  
stage has internal 50 ohm pull up giving a 1 V p-p  
output. See application notes for more details  
DC to 10 GHz PLL applications  
HyperLan  
LMDS  
Instrumentation  
Satellite Communications  
Fibre Optic Communications; OC48, OC192  
Ultra Low Jitter Clock Systems  
VCC IN  
1
VCC OUT  
8
50 Ohm  
OUTPUT  
7
6
OUTPUT B  
Vref  
Div 4  
400 Ohm  
INPUT  
2
INPUT B  
3
20mA  
GND  
4
GND  
5
Figure 1 - Block Diagram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 2003-2006, Zarlink Semiconductor Inc. All Rights Reserved.  

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