Datasheet > ZL40225

ZL40225

更新时间： 2024-11-30 14:55:55

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
25页	553K
描述
The ZL40225 is an LVPECL clock fan out buffer with two input and eight output clock drivers capabl

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ZL40225 数据手册

ZL40225

Precision 2:8 LVPECL Fanout Buffer with

Simple Input Reference Switching

and On-Chip Input Termination

Data Sheet

April 2014

Features

Ordering Information

ZL40225LDG1 32 Pin QFN

Trays

Inputs/Outputs

ZL40225LDF1

32 Pin QFN

Tape and Reel

•

Accepts two differential or single-ended inputs

LVPECL, LVDS, CML, HCSL, LVCMOS

Matte Tin

Package size: 5 x 5 mm

•

-40^oC to +85^oC

•

On-chip input termination resistors and biasing for

AC coupled inputs

•

Eight precision LVPECL outputs

Applications

Operating frequency up to 750 MHz

•

General purpose clock distribution

Low jitter clock trees

Power

•

Options for 2.5 V or 3.3 V power supply

Logic translation

Core current consumption of 122 mA

Clock and data signal restoration

Redundant clock distribution

On-chip Low Drop Out (LDO) Regulator for superior

power supply rejection

Wired communications: OTN, SONET/SDH, GE,

10 GE, FC and 10G FC

Performance

•

PCI Express generation 1/2/3 clock distribution

Wireless communications

•

Ultra low additive jitter of 33 fs RMS

High performance microprocessor clock

distribution

out0_p

out0_n

out1_p

out1_n

ctrl0

vt0

Termination

and Bias

out2_p

out2_n

clk0_p

clk0_n

out3_p

out3_n

clk1_p

clk1_n

Buffer

out4_p

out4_n

ctrl1

vt1

Termination

and Bias

out5_p

out5_n

out6_p

out6_n

sel

out7_p

out7_n

Figure 1 - Functional Block Diagram

Microsemi Corporation

12 3 4 5 6 7...25

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