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ZL40213 PDF预览

ZL40213

更新时间: 2024-11-30 14:54:47
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
22页 558K
描述
he ZL40213 is an LVDS clock fanout buffer with two identical output clock drivers capable of opera

ZL40213 数据手册

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ZL40213  
Precision 1:2 LVDS Fanout Buffer  
with On-Chip Input Termination  
Data Sheet  
April 2014  
Ordering Information  
Features  
ZL40213LDG1  
ZL40213LDF1  
16 Pin QFN  
16 Pin QFN  
Trays  
Tape and Reel  
Inputs/Outputs  
Accepts differential or single-ended input  
LVPECL, LVDS, CML, HCSL, LVCMOS  
Matte Tin  
Package size: 3 x 3 mm  
-40oC to +85oC  
On-chip input termination resistors and biasing for  
AC coupled inputs  
Two precision LVDS outputs  
Applications  
Operating frequency up to 750 MHz  
General purpose clock distribution  
Low jitter clock trees  
Power  
Logic translation  
Options for 2.5 V or 3.3 V power supply  
Clock and data signal restoration  
Current consumption of 44 mA  
Wired communications: OTN, SONET/SDH, GE,  
10 GE, FC and 10G FC  
On-chip Low Drop Out (LDO) Regulator for superior  
power supply rejection  
PCI Express generation 1/2/3 clock distribution  
Wireless communications  
Performance  
Ultra low additive jitter of 78 fs RMS  
High performance microprocessor clock  
distribution  
out0_p  
out0_n  
ctrl  
vt  
Termination  
and Bias  
Buffer  
clk_p  
clk_n  
out1_p  
out1_n  
Figure 1 - Functional Block Diagram  
1
Microsemi Corporation  
Copyright 2014, Microsemi Corporation. All Rights Reserved.  

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