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ZL40210 PDF预览

ZL40210

更新时间: 2024-11-30 14:53:35
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
27页 570K
描述
The ZL40210 is an LVPECL clock fanout buffer with eight output clock drivers capable of operating

ZL40210 数据手册

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ZL40210  
Precision 2:8 LVPECL Fanout Buffer with  
Glitch-free Input Reference Switching  
Data Sheet  
April 2014  
Features  
Ordering Information  
Inputs/Outputs  
ZL40210LDG1  
ZL40210LDF1  
32 Pin QFN  
32 Pin QFN  
Matte Tin  
Trays  
Tape and Reel  
Accepts two differential or single-ended inputs  
LVPECL, LVDS, CML, HCSL, LVCMOS  
Package size: 5 x 5 mm  
o
o
Glitch-free switching of references  
-40 C to +85 C  
Eight precision LVPECL outputs  
Applications  
Operating frequency up to 750 MHz  
General purpose clock distribution  
Low jitter clock trees  
Power  
Options for 2.5 V or 3.3 V power supply  
Logic translation  
Core current consumption of 122 mA  
Clock and data signal restoration  
Redundant clock distribution  
On-chip Low Drop Out (LDO) Regulator for superior  
power supply rejection  
Wired communications: OTN, SONET/SDH, GE,  
10 GE, FC and 10G FC  
Performance  
Ultra low additive jitter of 121 fs RMS  
PCI Express generation 1/2/3 clock distribution  
Wireless communications  
High performance microprocessor clock distribution  
out0_p  
out0_n  
out1_p  
out1_n  
out2_p  
out2_n  
clk0_p  
clk0_n  
out3_p  
out3_n  
clk1_p  
clk1_n  
Buffer  
out4_p  
out4_n  
out5_p  
out5_n  
out6_p  
out6_n  
sel  
out7_p  
out7_n  
Figure 1 - Functional Block Diagram  
1
Microsemi Corporation  
Copyright 2014, Microsemi Corporation, All Rights Reserved.  

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