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ZL40201

更新时间: 2024-11-30 14:54:03
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
24页 596K
描述
The ZL40201 is an LVPECL clock fan out buffer with two identical output clock drivers capable of o

ZL40201 数据手册

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ZL40201  
Precision 1:2 LVPECL Fanout Buffer  
with On-Chip Input Termination  
Data Sheet  
April 2014  
Ordering Information  
Features  
ZL40201LDG1  
16 Pin QFN  
16 Pin QFN  
Matte Tin  
Trays  
Tape and Reel  
ZL40201LDF1  
Inputs/Outputs  
Accepts differential or single-ended input  
LVPECL, LVDS, CML, HCSL, LVCMOS  
Package size: 3 x 3 mm  
-40oC to +85oC  
On-chip input termination resistors and biasing for  
AC coupled inputs  
Applications  
General purpose clock distribution  
Low jitter clock trees  
Two precision LVPECL outputs  
Operating frequency up to 750 MHz  
Logic translation  
Power  
Clock and data signal restoration  
Wired communications: OTN, SONET/SDH, GE,  
10 GE, FC and 10G FC  
Option for 2.5 V or 3.3 V power supply  
Core current consumption of 49 mA  
PCI Express generation 1/2/3 clock distribution  
Wireless communications  
On-chip Low Drop Out (LDO) Regulator for superior  
power supply rejection  
High performance microprocessor clock  
distribution  
Performance  
Ultra low additive jitter of 40 fs  
out0_p  
out0_n  
ctrl  
vt  
Termination  
and Bias  
Buffer  
clk_p  
clk_n  
out1_p  
out1_n  
Figure 1 - Functional Block Diagram  
1
Microsemi Corporation  
Copyright 2014, Microsemi Corporation. All Rights Reserved.  

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