Datasheet > ZL38003

ZL38003

更新时间： 2024-11-23 03:08:35

品牌	Logo	应用领域
加拿大卓联 - ZARLINK		/
页数	文件大小	规格书
51页	579K
描述
Digital Echo Canceller for Hands Free Communication

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中文翻译

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ZL38003 数据手册

ZL38002

Digital Echo Canceller for Hands Free

Communication

Data Sheet

January 2007

Features

Ordering Information

•

112 ms acoustic echo canceller

Up to 12 dB of noise reduction

ZL38002QDG

48 Pin TQFP

Trays

ZL38002QDG1 48 Pin TQFP* Trays

ZL38002DGE1 36 Pin QSOP* Tubes, Bake & Drypack

ZL38002DGF1 36 Pin QSOP* Tape & Reel,

Bake & Drypack

Works with low cost voice codec. ITU-T G.711 or

signed mag µ/A-Law, or linear 2’s compliment

•

Each port may operate independently in

*Pb Free Matte Tin

-40°C to 85°C

companded format or linear format

Advanced NLP design - full duplex speech with

no switched loss on audio paths

•

User gain control provided for speaker path

(-24 dB to +21 dB in 3 dB steps)

Adjustable gain pads from -24 dB to +21 dB at

Xin, Sin and Sout to compensate for different

system requirements

Fast re-convergence time: tracks changing echo

environment quickly

Adaptation algorithm converges even during

Double-Talk

Designed for exceptional performance in high

•

AGC on speaker path

background noise environments

Handles up to -6 dB acoustic echo return loss

Provides protection against narrow-band signal

divergence

(with the appropriate gain pad settings)

•

Transparent data transfer and mute options

20 MHz master clock operation

Low power mode during PCM Bypass

Bootloadable for future factory software upgrades

2.7 V to 3.6 V supply voltage; 5 V-tolerant inputs

Howling prevention stops uncontrolled oscillation

in high loop gain conditions

•

Programmable offset nulling of all PCM channels

Serial micro-controller interface

Idle channel noise suppression

ST-BUS, GCI, or variable-rate SSI PCM

interfaces

Limiter

S₁

S₂

Noise

Reduction

µ/A-Law/

Linear/

ADV

NLP

Gain

Pad

Gain

Pad

Sin

Sout

Linear

µ/A-Law

Filter

DATA1

DATA2

MD1

Program

RAM

NBSD

Micro

Interface

CONTROL

UNIT

Program

ROM

Adaptive

Filter

Double

Talk

Gain

Pad

Detector

Howling

Controller

NBSD

R₁

SCLK

MD2

Rout

-24 -> +21dB

User

Gain

µ/A-Law/

Linear/

µ/A-Law

Rin

AGC

Filter

Linear

Limiter

VSS

VDD

BCLK/C4i

FORMAT

ENA1

MCLK

RESET

ENA2

LAW

F0i

Figure 1 - Functional Block Diagram

Zarlink Semiconductor Inc.

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

12 3 4 5 6 7...51

中文翻译

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与ZL38003相关器件

型号	品牌	获取价格	描述	数据表
ZL38003_06	ZARLINK	获取价格	AEC with Noise Reduction & Codecs for Digital Hands-Free Communication
ZL38003GMG	ZARLINK	获取价格	AEC with Noise Reduction & Codecs for Digital Hands-Free Communication
ZL38003GMG2	ZARLINK	获取价格	AEC with Noise Reduction & Codecs for Digital Hands-Free Communication
ZL38004	ZARLINK	获取价格	Dedicated Voice Processor with Dual Channel Codec
ZL38004GGG2	ZARLINK	获取价格	ADPCM Codec, 1-Func, PBGA96, 7 X 7 MM, 0.91 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, VFBGA-96
ZL38004QCG1	ZARLINK	获取价格	Dedicated Voice Processor with Dual Channel Codec
ZL38005	ZARLINK	获取价格	Enhanced Voice Processor with Dual Wideband Codecs
ZL38005GGG2	ZARLINK	获取价格	Enhanced Voice Processor with Dual Wideband Codecs
ZL38005GGG2	MICROSEMI	获取价格	ADPCM Codec, 1-Func, PBGA96, 7 X 7 MM, 0.91 MM HEIGHT, 0.50 MM PITCH, LEAD FREE, VFBGA-96
ZL38005QCG1	ZARLINK	获取价格	Enhanced Voice Processor with Dual Wideband Codecs

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