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ZL10036LDE PDF预览

ZL10036LDE

更新时间: 2024-01-30 06:29:25
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 信息通信管理商用集成电路
页数 文件大小 规格书
38页 701K
描述
Consumer Circuit, BICMOS, 6 X 6 MM, QFN-40

ZL10036LDE 技术参数

生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN,针数:40
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.82商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:S-XQCC-N40长度:6 mm
功能数量:1端子数量:40
最高工作温度:85 °C最低工作温度:-10 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
认证状态:Not Qualified座面最大高度:0.9 mm
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
表面贴装:YES温度等级:OTHER
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD宽度:6 mm

ZL10036LDE 数据手册

 浏览型号ZL10036LDE的Datasheet PDF文件第2页浏览型号ZL10036LDE的Datasheet PDF文件第3页浏览型号ZL10036LDE的Datasheet PDF文件第4页浏览型号ZL10036LDE的Datasheet PDF文件第5页浏览型号ZL10036LDE的Datasheet PDF文件第6页浏览型号ZL10036LDE的Datasheet PDF文件第7页 
ZL10036  
Digital Satellite Tuner with RF Bypass  
Data Sheet  
July 2004  
Features  
QPSK tuner for quadrature down conversion from  
Ordering Information  
L-band to Zero IF  
ZL10036LDG 40-pin QFN  
ZL10036LDF 40-pin QFN  
(trays)  
Compatible with DSS and DVB formats (QPSK)  
Symbol rate range 1 to 45 MSps  
(tape and reel)  
ZL10036LDG1 40-pin QFN* (trays)  
Power & forget, fully integrated, alignment free,  
ZL10036LDF1 40-pin QFN*  
(tape and reel)  
local oscillator  
*Pb free  
-10°C to +85°C  
Integrated baseband filters with bandwidth adjust  
from 4 to 40 MHz  
Good immunity to strong adjacent undesired  
channels  
Description  
Selectable RF bypass  
I²C bus interface with 3V3 compatible logic levels  
The ZL10036 is a single chip wideband direct  
conversion tuner, with integral RF bypass, optimized  
for application in digital satellite receiver systems.  
Integrated RF loop through for cascaded tuner  
applications  
The device offers a highly integrated solution to a  
satellite tuner function, incorporating an I²C bus  
interface controller, a low phase noise PLL frequency  
synthesizer, a quadrature phase split tuner, a fully  
integrated local oscillator which requires no production  
set up, and adjustable baseband channel filters.  
Power saving mode/hardware power down  
Optimized front end solution when partnered with  
Zarlink ZL10312 demodulator  
Applications  
The I²C bus interface controls all of the tuner  
functionality including the PLL frequency synthesizer,  
the bypass disable and the baseband gain and  
bandwidth adjust.  
Satellite receiver systems  
Figure 1 - Basic Block Diagram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 2004, Zarlink Semiconductor Inc. All Rights Reserved.  
 

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