Datasheet > Z16C30

Z16C30

更新时间： 2024-09-26 07:43:35

品牌	Logo	应用领域
ZILOG		控制器
页数	文件大小	规格书
86页	981K
描述
CMOS USC Universal Controller

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中文翻译

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数据手册

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Z16C30 数据手册

PRODUCT SPECIFICATION

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• Two Independent 0-to-10-mbps Full-Duplex Channels,

each with Two Baud Rate Generators and One Digital

Phase-Locked Loop for Clock Recovery

Receive Sync Stripping; Optional Preamble Transmis-

sion; 16- or 32-Bit CRC

• Transparent Bisync Mode with EBCDIC or ASCII Char-

acter Code; Automatic CRC Handling; Programmable

Idle Line Condition; Optional Preamble Transmission;

Automatic Recognition of DLE, SYN, SOH, ITX, ETX,

ETB, EOT, ENQ and ITB

• 32-Byte Data FIFO’s for each Receiver and Transmitter

• 110-ns Bus Cycle Time, 16-Bit Data Bus Bandwidth

• Multi-Protocol Operation under Program Control with

• External Character Sync Mode for Receive

Independent Mode Selection for Receiver and Transmit-

ter

• HDLC/SDLC Mode with Eight-Bit Address Compare;

Extended Address Field Option; 16- or 32-Bit CRC; Pro-

grammable Idle Line Condition; Optional Preamble

Transmission and Loop Mode

• Async Mode with 1 to 8 Bits/Character, 1/16 to 2 Stop

Bits/Character in 1/16-Bit Increments; Programmable

Clock Factor; Break Detect and Generation; Odd, Even,

Mark, Space or no Parity and Framing Error Detection;

Supports One Address/Data Bit and MIL STD 1553B

Protocols

• DMA Interface with Separate Request and Acknowl-

edge for Each Receiver and Transmitter

• Channel Load Command for DMA Controlled Initializa-

tion

• Byte Oriented Synchronous Mode with One to Eight

Bits/Character; Programmable Idle Line Condition; Op-

tional Receive Sync Stripping; Optional Preamble

Transmission; 16- or 32-Bit CRC and Transmit-to-Re-

ceive Slaving (for X.21)

• Flexible Bus Interface for Direct Connection to Most

Microprocessors; User Programmable for 8 or 16 Bits

Wide. Directly Supports 680X0 Family or 8X86 Family

Bus Interfaces

• Low Power CMOS

• Bisync Mode with 2- to 16-Bit Programmable Sync

Character; Programmable Idle Line Condition; Optional • 68-Pin PLCC/100-Pin VQFP Packages

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The Z16C30 USC™ Universal Serial Controller is a dual-

channel multi-protocol data communications peripheral de-

signed for use with any conventional multiplexed or non-

multiplexed bus. The USC functions as a serial-to-parallel,

parallel-to-serial converter/controller and may be software

configured to satisfy a wide variety of serial communica-

tions applications. The device contains a variety of new, so-

phisticated internal functions including two baud rate gen-

erators per channel, one digital phase-locked loop per

channel, character counters for both receive and transmit in

each channel and 32-byte data FIFO’s for each receiver and

transmitter (Figure 1).

ZiLOG now offers a high speed version of the USC with

improved bus bandwidth. CPU bus accesses have been

shortened from 160 ns per access to 110 ns per access. The

USC has a transmit and receive clock range of up to 10 MHz

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中文翻译

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与Z16C30相关器件

型号	品牌	获取价格	描述	数据表
Z16C30_08	ZILOG	获取价格	CMOS USC Universal Serial Controller
Z16C3010AEC	ZILOG	获取价格	CMOS USC Universal Serial Controller
Z16C3010AEC	IXYS	获取价格	Multi Protocol Controller, 2 Channel(s), 1.25MBps, CMOS, PQFP100, VQFP-100
Z16C3010AEC00TR	ZILOG	获取价格	CMOS USC Universal Serial Controller
Z16C3010AEG	ZILOG	获取价格	CMOS USC Universal Serial Controller
Z16C3010AEG	IXYS	获取价格	Multi Protocol Controller, 2 Channel(s), 1.25MBps, CMOS, PQFP100, VQFP-100
Z16C3010AEG-ND	ZILOG	获取价格	CMOS USC Universal Serial Controller
Z16C3010ASC	ZILOG	获取价格	CMOS USC Universal Serial Controller
Z16C3010ASC	IXYS	获取价格	Multi Protocol Controller, 2 Channel(s), 1.25MBps, CMOS, PQFP100, VQFP-100
Z16C3010ASC00TR	ZILOG	获取价格	CMOS USC Universal Serial Controller

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