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XM28C010PM-12 PDF预览

XM28C010PM-12

更新时间: 2024-02-22 21:14:04
品牌 Logo 应用领域
XICOR 存储内存集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
3页 28K
描述
High Speed 5 Volt Byte Alterable Nonvolatile Memory Array

XM28C010PM-12 技术参数

生命周期:Obsolete包装说明:CERAMIC, PGA-66
Reach Compliance Code:unknown风险等级:5.5
Is Samacsys:N最长访问时间:120 ns
其他特性:CONFIGURABLE AS 128K X 8备用内存宽度:16
JESD-30 代码:S-CPGA-P66长度:27.686 mm
内存密度:1048576 bit内存集成电路类型:EEPROM MODULE
内存宽度:32功能数量:1
端子数量:66字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:32KX32输出特性:3-STATE
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:PGA
封装形状:SQUARE封装形式:GRID ARRAY
并行/串行:PARALLEL编程电压:5 V
认证状态:Not Qualified座面最大高度:8.128 mm
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:PIN/PEG端子节距:2.54 mm
端子位置:PERPENDICULAR宽度:27.686 mm
Base Number Matches:1

XM28C010PM-12 数据手册

 浏览型号XM28C010PM-12的Datasheet PDF文件第2页浏览型号XM28C010PM-12的Datasheet PDF文件第3页 
1 Megabit Puma Module  
32K x 32 Bit  
XM28C010P  
High Speed 5 Volt Byte Alterable Nonvolatile Memory Array  
FEATURES  
• High Reliability  
—Endurance: 100,000 Cycles  
—Data Retention: 100 Years  
• High Speed, High Density Memory Module  
—150ns, 120ns, 90ns and 70ns Access Times  
Available  
—1 Megabit Memory in 1 square inch.  
• Flexible Multiplane Architecture  
—Four Separate Chip Selects  
—32 Separate I/Os  
• User Configurable I/Os—x8, x16, or x32  
• User Configurable Page Size—64 Double-  
words, 128 Words, or 256 Bytes  
—Concurrent Read/Write Operations  
• Able to Continue Reading During a  
Nonvolatile Write Cycle.  
DESCRIPTION  
The XM28C010P is a high speed, high density CMOS  
byte alterable nonvolatile memory array constructed on  
a co-fired ceramic substrate using Xicor’s High Speed  
32K x 8 components in 32-pad leadless chip carriers.  
The Substrate is a 66-pin ceramic pin grid array.  
The module is configured with four separate chip  
enable and write enable inputs and 32 separate I/Os.  
This, along with the small footprint, provides the end  
user with a large degree of flexibility in board layout and  
memory configuration. In addition, with the large num-  
ber of pins and the growth path being implemented, the  
module will be able to grow to 16 megabits.  
• 5 Volt Byte or Page Alterable  
—No Erase Before Write  
• Software Data Protection  
• Early End of Write Polling  
DATA Polling  
Toggle Bit Polling  
FUNCTIONAL DIAGRAM  
OE WE1 CE1  
WE2 CE2  
WE3 CE3  
WE4 CE4  
32k x 8  
32k x 8  
32k x 8  
32k x 8  
A0–A15  
I/O0–I/O7  
I/O8–I/O15  
I/O16–I/O23  
I/O24–I/O31  
6491 ILL F01  
Xicor, 1995, 1996 Patents Pending  
6491-1.3 8/12/97 T0/C2/D0 NS  
Characteristics subject to change without notice  
1

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