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XCR22LV10-10VO24C

更新时间： 2024-11-10 22:08:31
品牌 Logo 应用领域
赛灵思 - XILINX 可编程逻辑器件光电二极管输入元件时钟
页数 文件大小 规格书
14页 210K
描述
TotalCMOS, Universal PLD Device

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中文翻译

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XCR22LV10-10VO24C 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：TSSOP, TSSOP24,.25
针数：24Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.85
Is Samacsys：N架构：PAL-TYPE
最大时钟频率：125 MHzJESD-30 代码：R-PDSO-G24
JESD-609代码：e0长度：7.8 mm
湿度敏感等级：1专用输入次数：11
I/O 线路数量：10输入次数：22
输出次数：10产品条款数：132
端子数量：24最高工作温度：70 °C
最低工作温度：组织：11 DEDICATED INPUTS, 10 I/O
输出函数：MACROCELL封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP24,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：225电源：3.3 V
可编程逻辑类型：EE PLD传播延迟：10 ns
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Programmable Logic Devices最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：TIN LEAD
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

XCR22LV10-10VO24C 数据手册

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0
R
XCR22LV10: 3V Zero Power,  
TotalCMOS, Universal PLD Device  
0
0*  
DS047 (v1.1) February 10, 2000  
Product Specification  
Features  
Description  
•
Industry's first TotalCMOS™ SPLD - both CMOS  
design and process technologies  
Fast Zero Power (FZP™) design technique provides  
ultra-low power and high speed  
The XCR22LV10 is the first SPLD to combine high perfor-  
mance with low power, without the need for "turbo bits" or  
other power down schemes. To achieve this, Xilinx has  
used their FZP design technique, which replaces conven-  
tional sense amplifier methods for implementing product  
terms (a technique that has been used in PLDs since the  
bipolar era) with a cascaded chain of pure CMOS gates.  
This results in the combination of low power and high  
speed that has previously been unattainable in the PLD  
arena. For 5V operation, Xilinx offers the XCR22V10 that  
offers high speed and low power in a 5V implementation.  
•
-
-
Static current of less than 45 µA  
Dynamic current substantially below that of  
competing devices  
-
Pin-to-pin delay of only 10 ns  
•
•
•
True Zero Power device with no turbo bits or power  
down schemes  
Function/JEDEC map compatible with Bipolar,  
UVCMOS, EECMOS 22V10s  
Multiple packaging options featuring PCB-friendly  
flow-through pinouts (SOL and TSSOP)  
The XCR22LV10 uses the familiar AND/OR logic array  
structure, which allows direct implementation of  
sum-of-products equations. This device has a programma-  
ble AND array which drives a fixed OR array. The OR sum  
of products feeds an "Output Macro Cell" (OMC), which can  
be individually configured as a dedicated input, a combina-  
torial output, or a registered output with internal feedback.  
-
24-pin TSOIC–uses 93% less in-system space than  
a 28-pin PLCC  
-
-
24-pin SOIC  
28-pin PLCC with standard JEDEC pinout  
•
•
Available in commercial and industrial operating ranges  
Supports mixed voltage systems—5V tolerant I/Os  
Functional Description  
The XCR22LV10 implements logic functions as  
2
•
•
•
•
Advanced 0.5µ E CMOS process  
1000 erase/program cycles guaranteed  
20 years data retention guaranteed  
Varied product term distribution with up to 16 product  
terms per output for complex functions  
Programmable output polarity  
Synchronous preset/asynchronous reset capability  
Security bit prevents unauthorized access  
Electronic signature for identification  
Design entry and verification using industry standard  
CAE tools  
sum-of-products expressions in  
a
programmable-  
AND/fixed-OR logic array. User-defined functions are cre-  
ated by programming the connections of input signals into  
the array. User-configurable output structures in the form of  
I/O macrocells further increase logic flexibility (Figure 1).  
•
•
•
•
•
•
Reprogrammable using industry standard device  
programmers  
DS047 (v1.1) February 10, 2000  
www.xilinx.com  
1
1-800-255-7778  
1234567...14

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