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XCF02SVOG20CES PDF预览

XCF02SVOG20CES

更新时间: 2024-01-15 00:46:50
品牌 Logo 应用领域
赛灵思 - XILINX 可编程只读存储器
页数 文件大小 规格书
42页 356K
描述
Configuration Memory, 2MX1, Serial, CMOS, PDSO20, LEAD FREE, PLASTIC, TSSOP-20

XCF02SVOG20CES 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP,针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.45
Is Samacsys:NJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:6.5024 mm
内存密度:2097152 bit内存集成电路类型:CONFIGURATION MEMORY
内存宽度:1湿度敏感等级:3
功能数量:1端子数量:20
字数:2097152 words字数代码:2000000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:2MX1
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行:SERIAL峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.19 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:4.4 mm
Base Number Matches:1

XCF02SVOG20CES 数据手册

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Platform Flash In-System Programmable  
Configuration PROMS  
0
DS123 (v2.6) March 14, 2005  
Preliminary Product Specification  
Features  
In-System Programmable PROMs for Configuration of  
Xilinx FPGAs  
XCF01S/XCF02S/XCF04S  
-
-
-
3.3V supply voltage  
Low-Power Advanced CMOS NOR FLASH Process  
Endurance of 20,000 Program/Erase Cycles  
Serial FPGA configuration interface (up to 33 MHz)  
Available in small-footprint VO20 and VOG20  
packages.  
Operation over Full Industrial Temperature Range  
(–40°C to +85°C)  
XCF08P/XCF16P/XCF32P  
-
-
1.8V supply voltage  
Serial or parallel FPGA configuration interface  
(up to 33 MHz)  
Available in small-footprint VO48, VOG48, FS48,  
and FSG48 packages  
Design revision technology enables storing and  
accessing multiple design revisions for  
configuration  
IEEE Standard 1149.1/1532 Boundary-Scan (JTAG)  
Support for Programming, Prototyping, and Testing  
JTAG Command Initiation of Standard FPGA  
Configuration  
-
-
Cascadable for Storing Longer or Multiple Bitstreams  
Dedicated Boundary-Scan (JTAG) I/O Power Supply  
(VCCJ  
)
I/O Pins Compatible with Voltage Levels Ranging From  
1.5V to 3.3V  
-
Built-in data decompressor compatible with Xilinx  
advanced compression technology  
Design Support Using the Xilinx Alliance ISE and  
Foundation ISE Series Software Packages  
Table 1: Platform Flash PROM Features  
JTAG ISP  
Serial Parallel  
Design  
Density  
V
V
Range  
V Range  
CCJ  
Packages  
Compression  
CCINT  
CCO  
Programming Config. Config. Revisioning  
XCF01S 1 Mbit  
XCF02S 2 Mbit  
XCF04S 4 Mbit  
3.3V  
3.3V  
3.3V  
VO20/VOG20  
VO20/VOG20  
VO20/VOG20  
1.8V - 3.3V 2.5V - 3.3V  
1.8V - 3.3V 2.5V - 3.3V  
1.8V - 3.3V 2.5V - 3.3V  
VO48/VOG48  
FS48/FSG48  
XCF08P 8 Mbit  
XCF16P 16 Mbit  
XCF32P 32 Mbit  
1.8V  
1.8V  
1.8V  
1.5V - 3.3V 2.5V - 3.3V  
VO48/VOG48  
FS48/FSG48  
1.5V - 3.3V  
2.5V - 3.3V  
VO48/VOG48  
FS48/FSG48  
1.5V - 3.3V 2.5V - 3.3V  
Description  
Xilinx introduces the Platform Flash series of in-system pro-  
grammable configuration PROMs. Available in 1 to 32  
Megabit (Mbit) densities, these PROMs provide an  
easy-to-use, cost-effective, and reprogrammable method  
for storing large Xilinx FPGA configuration bitstreams. The  
Platform Flash PROM series includes both the 3.3V  
XCFxxS PROM and the 1.8V XCFxxP PROM. The XCFxxS  
version includes 4-Mbit, 2-Mbit, and 1-Mbit PROMs that  
support Master Serial and Slave Serial FPGA configuration  
modes (Figure 1). The XCFxxP version includes 32-Mbit,  
16-Mbit, and 8-Mbit PROMs that support Master Serial,  
Slave Serial, Master SelectMAP, and Slave SelectMAP  
FPGA configuration modes (Figure 2). A summary of the  
Platform Flash PROM family members and supported fea-  
tures is shown in Table 1.  
© 2005 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.  
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.  
DS123 (v2.6) March 14, 2005  
www.xilinx.com  
1
Preliminary Product Specification  
 
 
 

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