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XC7V2000T-2FLG1925I PDF预览

XC7V2000T-2FLG1925I

更新时间： 2024-09-23 15:58:23
品牌 Logo 应用领域
赛灵思 - XILINX 栅可编程逻辑
页数 文件大小 规格书
68页 2518K
描述
Field Programmable Gate Array,

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中文翻译

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XC7V2000T-2FLG1925I 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：,Reach Compliance Code：compliant
风险等级：5.74JESD-609代码：e1
峰值回流温度（摄氏度）：NOT SPECIFIED可编程逻辑类型：FIELD PROGRAMMABLE GATE ARRAY
端子面层：TIN SILVER COPPER处于峰值回流温度下的最长时间：NOT SPECIFIED
Base Number Matches：1

XC7V2000T-2FLG1925I 数据手册

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Virtex-7 T and XT FPGAs Data Sheet:  
DC and Switching Characteristics  
DS183 (v1.11) January 31, 2013  
Preliminary Product Specification  
Introduction  
Virtex®-7 T and XT FPGAs are available in -3, -2, -1, and  
-2L speed grades, with -3 having the highest performance.  
grade (that is, the timing characteristics of a -1 speed grade  
industrial device are the same as for a -1 speed grade  
commercial device). However, only selected speed grades  
and/or devices are available in each temperature range.  
The -2L devices operate at V  
= 1.0V and are screened  
CCINT  
for lower maximum static power. The speed specification of  
a -2L device is the same as the -2 speed grade. The -2G  
speed grade is available in devices utilizing Stacked Silicon  
Interconnect (SSI) technology. The -2G speed grade  
supports 12.5 Gb/s GTX or 13.1 Gb/s GTH transceivers as  
well as the standard -2 speed grade specifications.  
All supply voltage and junction temperature specifications  
are representative of worst-case conditions. The  
parameters included are common to popular designs and  
typical applications.  
This Virtex-7 Tand XT FPGA data sheet, part of an overall  
set of documentation on the 7 series FPGAs, is available on  
the Xilinx website at www.xilinx.com/7.  
Virtex-7 Tand XT FPGA DC and AC characteristics are  
specified in commercial, extended, and industrial  
temperature ranges. Except the operating temperature  
range or unless otherwise noted, all the DC and AC  
electrical parameters are the same for a particular speed  
All specifications are subject to change without notice.  
DC Characteristics  
Table 1: Absolute Maximum Ratings  
(1)  
Symbol  
FPGA Logic  
VCCINT  
Description  
Min  
Max  
Units  
Internal supply voltage  
Auxiliary supply voltage  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
1.1  
2.0  
V
V
V
V
V
V
V
V
V
V
VCCAUX  
VCCBRAM  
Supply voltage for the block RAM memories  
Output drivers supply voltage for 3.3V HR I/O banks  
Output drivers supply voltage for 1.8V HP I/O banks  
Auxiliary supply voltage  
1.1  
3.6  
VCCO  
2.0  
VCCAUX_IO  
VREF  
2.06  
2.0  
Input reference voltage  
I/O input voltage  
VCCO + 0.5  
2.625  
2.0  
(2)(3)(4)(5)  
VIN  
I/O input voltage for VREF and differential I/O standards  
Key memory battery backup supply  
VCCBATT  
GTX and GTH Transceivers  
VMGTAVCC  
Analog supply voltage for the GTX/GTH transmitter and receiver circuits  
–0.5  
–0.5  
–0.5  
–0.5  
–0.5  
1.1  
1.32  
1.935  
1.32  
1.32  
V
V
V
V
V
VMGTAVTT  
Analog supply voltage for the GTX/GTH transmitter and receiver termination circuits  
Auxiliary analog Quad PLL (QPLL) voltage supply for the GTX/GTH transceivers  
GTX/GTH transceiver reference clock absolute input voltage  
VMGTVCCAUX  
VMGTREFCLK  
Analog supply voltage for the resistor calibration circuit of the GTX/GTH transceiver  
column  
VMGTAVTTRCAL  
VIN  
Receiver (RXP/RXN) and Transmitter (TXP/TXN) absolute input voltage  
–0.5  
1.26  
V
© 2011–2013 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Kintex, Artix, Zynq, Spartan, ISE, Vivado and other designated brands included herein are trademarks of Xilinx in the  
United States and other countries. All other trademarks are the property of their respective owners.  
DS183 (v1.11) January 31, 2013  
www.xilinx.com  
Preliminary Product Specification  
1
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