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XC7455ARX1000LG PDF预览

XC7455ARX1000LG

更新时间: 2024-11-26 20:39:51
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
64页 1127K
描述
32-BIT, 1000MHz, RISC PROCESSOR, CBGA483, 29 X 29 MM, 1.27 MM PITCH, CERAMIC, BGA-483

XC7455ARX1000LG 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:BGA,针数:483
Reach Compliance Code:unknownECCN代码:3A001.A.3
HTS代码:8542.31.00.01风险等级:5.45
地址总线宽度:36位大小:32
边界扫描:YES最大时钟频率:133 MHz
外部数据总线宽度:64格式:FLOATING POINT
集成缓存:YESJESD-30 代码:S-CBGA-B483
长度:29 mm低功率模式:YES
端子数量:483封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:BGA封装形状:SQUARE
封装形式:GRID ARRAY认证状态:Not Qualified
座面最大高度:3.2 mm速度:1000 MHz
最大供电电压:1.35 V最小供电电压:1.25 V
标称供电电压:1.3 V表面贴装:YES
技术:CMOS端子形式:BALL
端子节距:1.27 mm端子位置:BOTTOM
宽度:29 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

XC7455ARX1000LG 数据手册

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MPC7455EC  
Rev. 4.1, 02/2005  
Freescale Semiconductor  
Technical Data  
MPC7455  
RISC Microprocessor  
Hardware Specifications  
Contents  
The MPC7455 and MPC7445 are implementations of the  
1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
PowerPC™ microprocessor family of reduced instruction set  
computer (RISC) microprocessors. This document is primarily  
concerned with the MPC7455; however, unless otherwise noted,  
all information here also applies to the MPC7445. This document  
describes pertinent electrical and physical characteristics of the  
MPC7455. For functional characteristics of the processor, refer to  
the MPC7450 RISC Microprocessor Family Users Manual. To  
locate any published updates for this document, refer to the  
website at http://www.freescale.com.  
3. Comparison with the MPC7400, MPC7410,  
MPC7450, MPC7451, and MPC7441 . . . . . . . . . . . . . 7  
4. General Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
5. Electrical and Thermal Characteristics . . . . . . . . . . . 10  
6. Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33  
7. Pinout Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35  
8. Package Description . . . . . . . . . . . . . . . . . . . . . . . . . 41  
9. System Design Information . . . . . . . . . . . . . . . . . . . 45  
10. Document Revision History . . . . . . . . . . . . . . . . . . . 59  
11. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 60  
1 Overview  
The MPC7455 is the third implementation of the fourth generation  
(G4) microprocessors from Freescale. The MPC7455 implements  
the full PowerPC 32-bit architecture and is targeted at networking  
and computing systems applications. The MPC7455 consists of a  
processor core, a 256-Kbyte L2, and an internal L3 tag and  
controller which support a glueless backside L3 cache through a  
dedicated high-bandwidth interface. The MPC7445 is identical to  
the MPC7455 except it does not support the L3 cache interface.  
Figure 1 shows a block diagram of the MPC7455.  
© Freescale Semiconductor, Inc., 2005. All rights reserved.  

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