生命周期: | Obsolete | 零件包装代码: | PGA |
包装说明: | PGA, | 针数: | 184 |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.84 | 其他特性: | 144 MACROCELLS WITH PROGRAMMABLE I/O ARCHITECTURE |
最大时钟频率: | 55.6 MHz | JESD-30 代码: | S-CPGA-P184 |
专用输入次数: | I/O 线路数量: | 120 | |
端子数量: | 184 | 最高工作温度: | 70 °C |
最低工作温度: | 组织: | 0 DEDICATED INPUTS, 120 I/O | |
输出函数: | MACROCELL | 封装主体材料: | CERAMIC, METAL-SEALED COFIRED |
封装代码: | PGA | 封装形状: | SQUARE |
封装形式: | GRID ARRAY | 可编程逻辑类型: | UV PLD |
传播延迟: | 30 ns | 认证状态: | Not Qualified |
最大供电电压: | 5.25 V | 最小供电电压: | 4.75 V |
标称供电电压: | 5 V | 表面贴装: | NO |
技术: | CMOS | 温度等级: | COMMERCIAL |
端子形式: | PIN/PEG | 端子位置: | PERPENDICULAR |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
XC73144-12PG184I | XILINX |
获取价格 |
UV PLD, 30ns, CMOS, CPGA184, WINDOWED, CERAMIC, PGA-184 | |
XC73144-12PG184M | XILINX |
获取价格 |
UV PLD, CMOS, CPGA184, | |
XC73144-12PQ160I | XILINX |
获取价格 |
OT PLD, 30ns, 144-Cell, CMOS, PQFP160, PLASTIC, QFP-160 | |
XC73144-12WB225C | ETC |
获取价格 |
UV-Erasable/OTP Complex PLD | |
XC73144-12WB225I | ETC |
获取价格 |
UV-Erasable/OTP Complex PLD | |
XC73144-15 | XILINX |
获取价格 |
144-Macrocell CMOS EPLD | |
XC73144-15BG225C | XILINX |
获取价格 |
OT PLD, 36ns, 144-Cell, CMOS, PBGA225, PLASTIC, BGA-225 | |
XC73144-15BG225I | XILINX |
获取价格 |
OT PLD, 36ns, 144-Cell, CMOS, PBGA225, PLASTIC, BGA-225 | |
XC73144-15PG184C | XILINX |
获取价格 |
UV PLD, 36ns, CMOS, CPGA184, WINDOWED, CERAMIC, PGA-184 | |
XC73144-15PG184M | XILINX |
获取价格 |
UV PLD, 36ns, CMOS, CPGA184, WINDOWED, CERAMIC, PGA-184 |