Datasheet > X98024

X98024

更新时间： 2024-10-02 22:12:23

品牌	Logo	应用领域
英特矽尔 - INTERSIL		/
页数	文件大小	规格书
29页	294K
描述
240MHz Triple Video Digitizer with Digital PLL

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

X98024 数据手册

X98024

Data Sheet

June 6, 2005

FN8220.0

240MHz Triple Video Digitizer with

Digital PLL

Features

• 240MSPS maximum conversion rate

The X98024 3-channel, 8-bit Analog Front End (AFE)

contains all the components necessary to digitize analog

RGB or YUV graphics signals from personal computers,

workstations and video set-top boxes. The fully differential

analog design provides high PSRR and dynamic

performance to meet the stringent requirements of the

graphics display industry. The AFE’s 240MSPS conversion

rate supports resolutions up to WUXGA at 75Hz refresh rate,

while the front end's high input bandwidth ensures sharp

images at the highest resolutions.

• Low PLL clock jitter (250ps p-p @ 240MSPS)

• 64 interpixel sampling positions

• 0.35V

to 1.4V

video input range

p-p

• Programmable bandwidth (100MHz to 780MHz)

• 2 channel input multiplexer

• RGB and YUV 4:2:2 output formats

• 5 embedded voltage regulators allow operation from

single 3.3V supply and enhance performance, isolation

To minimize noise, the X98024's analog section features 2

sets of pseudo-differential RGB inputs with programmable

input bandwidth, as well as internal DC restore clamping

(including mid-scale clamping for YUV signals). This is

followed by the programmable gain/offset stage and the

three 240MSPS Analog-to-Digital Converters (ADCs).

Automatic Black Level Compensation (ABLC™) eliminates

part-to-part offset variation, ensuring perfect black level

performance in every application.

• Completely independent 8 bit gain/10 bit offset control

• CSYNC and SOG support

• Trilevel sync detection

• 1.15W typical P @ 240MSPS

• Pb-free plus anneal available (RoHS compliant)

Applications

The X98024's digital PLL generates a pixel clock from the

analog source's HSYNC or SOG (Sync-On-Green) signals.

Pixel clock output frequencies range from 10MHz to 240MHz

with sampling clock jitter of 250ps peak to peak.

• LCD Monitors and Projectors

• Digital TVs

• Plasma Display Panels

• RGB Graphics Processing

• Scan Converters

Simplified Block Diagram

Offset

DAC

ABLC™

Voltage

Clamp

8 or 16

RGB/YPbPr

RGB/YUV

PGA

8 bit ADC

OUT

HSYNC

VSYNC

OUT

SOG 1/2

OUT

Sync

Processing

HSYNC 1/2

Digital PLL

PIXELCLK

OUT

VSYNC 1/2

AFE Configuration and Control

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

12 3 4 5 6 7...29

中文翻译

下载PDF

与X98024相关器件

型号	品牌	获取价格	描述	数据表
X98024_06	INTERSIL	获取价格	240MHz Triple Video Digitizer with Digital PLL
X98024L128-3.3	INTERSIL	获取价格	240MHz Triple Video Digitizer with Digital PLL
X98024L128-3.3-Z	INTERSIL	获取价格	240MHz Triple Video Digitizer with Digital PLL
X98027	XICOR	获取价格	PRELIMINARY INFORMATION
X98027	INTERSIL	获取价格	275MHz Triple Video Digitizer with Digital PLL
X98027_06	INTERSIL	获取价格	275MHz Triple Video Digitizer with Digital PLL
X98027L128-3.3	INTERSIL	获取价格	275MHz Triple Video Digitizer with Digital PLL
X98027L128-3.3-Z	INTERSIL	获取价格	275MHz Triple Video Digitizer with Digital PLL
X99284-V3	HONEYWELL	获取价格	NO HOLES IN TERMINALS TERMINALS ARE PLATED SWITCH MATERIALS WILL WITHSTAND TEMPERATURE OF
X9C102	XICOR	获取价格	E2POTâ¢ Nonvolatile Digital Potentiometer

与X98024相关文章

塔塔电子与力积电达成技术转让协议，携手建设印度首座晶圆厂
2024-09-29

38
英特尔震撼发布：128核心256线程的至强6性能核处理器
2024-09-29

33
SK海力士量产12层HBM3E，容量高达36GB
2024-09-27

30
意法半导体传感器驱动Sphere，开启沉浸式电影新时代
2024-09-27

42

产品中心

服务支持

精选活动

关于我们

帮助中心

X98024

X98024 数据手册

与X98024相关器件

与X98024相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

X98024

X98024 数据手册

与X98024相关器件

与X98024相关文章

您还可以找

您在本页遇到什么问题？