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X98017_06

更新时间: 2024-10-03 03:14:55
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
29页 441K
描述
170MHz Triple Video Digitizer with Digital PLL

X98017_06 数据手册

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X98017  
®
ta Sheet  
March 8, 2006  
FN8218.3  
170MHz Triple Video Digitizer with  
Digital PLL  
Features  
• 170MSPS maximum conversion rate  
The X98017 3-channel, 8-bit Analog Front End (AFE)  
contains all the components necessary to digitize analog  
RGB or YUV graphics signals from personal computers,  
workstations and video set-top boxes. The fully differential  
analog design provides high PSRR and dynamic  
performance to meet the stringent requirements of the  
graphics display industry. The AFE’s 170MSPS conversion  
rate supports resolutions up to UXGA at 60Hz refresh rate,  
while the front end's high input bandwidth ensures sharp  
images at the highest resolutions.  
• Low PLL clock jitter (250ps p-p @ 170MSPS)  
• 64 interpixel sampling positions  
• 0.35V  
to 1.4V  
video input range  
p-p  
p-p  
• Programmable bandwidth (100MHz to 780MHz)  
• 2 channel input multiplexer  
• RGB and YUV 4:2:2 output formats  
• 5 embedded voltage regulators allow operation from  
single 3.3V supply and enhance performance, isolation  
To minimize noise, the X98017's analog section features 2  
sets of pseudo-differential RGB inputs with programmable  
input bandwidth, as well as internal DC restore clamping  
(including mid-scale clamping for YUV signals). This is  
followed by the programmable gain/offset stage and the  
three 170MSPS Analog-to-Digital Converters (ADCs).  
Automatic Black Level Compensation (ABLC™) eliminates  
part-to-part offset variation, ensuring perfect black level  
performance in every application.  
• Completely independent 8 bit gain/10 bit offset control  
• CSYNC and SOG support  
• Trilevel sync detection  
• 1.05W typical P @ 170MSPS  
D
• Pb-free plus anneal available (RoHS compliant)  
Applications  
• LCD Monitors and Projectors  
The X98017's digital PLL generates a pixel clock from the  
analog source's HSYNC or SOG (Sync-On-Green) signals.  
Pixel clock output frequencies range from 10MHz to 170MHz  
with sampling clock jitter of 250ps peak to peak.  
• Digital TVs  
• Plasma Display Panels  
• RGB Graphics Processing  
• Scan Converters  
Simplified Block Diagram  
Offset  
DAC  
ABLC™  
Voltage  
Clamp  
3
8 or 16  
x3  
RGB/YPbPr  
RGB/YPbPr  
1
2
IN  
RGB/YUV  
+
PGA  
8 bit ADC  
OUT  
3
IN  
HSYNC  
VSYNC  
OUT  
OUT  
SOG 1/2  
IN  
HS  
OUT  
PIXELCLK  
Sync  
Processing  
HSYNC 1/2  
IN  
Digital PLL  
OUT  
VSYNC 1/2  
IN  
AFE Configuration and Control  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved  
1
All other trademarks mentioned are the property of their respective owners.  

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