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X9110TV14-2.7 PDF预览

X9110TV14-2.7

更新时间: 2024-01-03 22:16:20
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XICOR /
页数 文件大小 规格书
21页 134K
描述
Single Digitally-Controlled (XDCP) Potentiometer

X9110TV14-2.7 数据手册

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APPLICATION NOTES AND DEVELOPMENT SYSTEM  
A V A I L A B L E  
AN99 • AN115 • AN124 •AN133 • AN134 • AN135  
Dual Supply / Low Power / 1024-tap / SPI bus  
X9110  
Preliminary Information  
Single Digitally-Controlled (XDCP) Potentiometer  
FEATURES  
DESCRIPTION  
• 1024 Resistor Taps – 10-Bit Resolution  
• SPI Serial Interface for write, read, and transfer  
operations of the potentiometer  
The X9110 integrates a single digitally controlled  
potentiometer (XDCP) on  
integrated circuit.  
a
monolithic CMOS  
• Wiper Resistance, 40Typical @ 5V  
• Four Non-Volatile Data Registers  
• Non-Volatile Storage of Multiple Wiper Positions  
• Power On Recall. Loads SavedWiper Position on  
Power Up.  
The digital controlled potentiometer is implemented  
using 1023 resistive elements in a series array.  
Between each element are tap points connected to the  
wiper terminal through switches. The position of the  
wiper on the array is controlled by the user through the  
SPI bus interface. The potentiometer has associated  
with it a volatile Wiper Counter Register (WCR) and  
four non-volatile Data Registers that can be directly  
written to and read by the user. The contents of the  
WCR controls the position of the wiper on the resistor  
array though the switches. Powerup recalls the  
contents of the default data register (DR0) to the WCR.  
• Standby Current < 3µA Max  
• System V : 2.7V to 5.5V Operation  
CC  
• Analog V+/V-: -5V to +5V  
• 100KEnd to End Resistance  
• 100 yr. Data Retention  
• Endurance: 100, 000 data changes per bit per  
register  
• 14-Lead TSSOP, xx-Lead XBGA  
• Dual Supply Version of the X9111  
• Low Power CMOS  
The XDCP can be used as  
a three-terminal  
potentiometer or as a two terminal variable resistor in  
a wide variety of applications including control,  
parameter adjustments, and signal processing.  
FUNCTIONAL DIAGRAM  
V
R
V+  
CC  
H
Address  
Data  
Status  
Write  
Read  
Power On Recall  
100KΩ  
1024-taps  
Transfer  
Bus  
Interface &  
Control  
Wiper Counter  
Register (WCR)  
SPI  
Bus  
Interface  
POT  
Wiper  
Data Registers  
(DR0-DR3)  
Control  
R
R
V-  
V
NC  
NC  
W
L
SS  
Characteristics subject to change without notice. 1 of 21  
REV 1.1.4 11/13/00  
www.xicor.com  

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