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X86C64EM PDF预览

X86C64EM

更新时间: 2024-09-24 13:15:35
品牌 Logo 应用领域
XICOR /
页数 文件大小 规格书
12页 64K
描述
EEPROM, 8KX8, 120ns, Parallel, CMOS, CQCC32, CERAMIC, LCC-32

X86C64EM 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QCCN, LCC32,.45X.55Reach Compliance Code:unknown
风险等级:5.64最长访问时间:120 ns
其他特性:PAGE WRITE; 10K ENDURANCE WRITE CYCLES; DATA RETENTION=100 YEARS命令用户界面:NO
数据轮询:NO数据保留时间-最小值:100
耐久性:10000 Write/Erase CyclesJESD-30 代码:R-CQCC-N32
JESD-609代码:e0长度:13.97 mm
内存密度:65536 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:32字数:8192 words
字数代码:8000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:8KX8封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装等效代码:LCC32,.45X.55
封装形状:RECTANGULAR封装形式:CHIP CARRIER
页面大小:32 words并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
编程电压:5 V认证状态:Not Qualified
座面最大高度:3.048 mm最大待机电流:0.0005 A
子类别:EEPROMs最大压摆率:0.06 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED切换位:YES
宽度:11.43 mmBase Number Matches:1

X86C64EM 数据手册

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Preliminary Information  
®
Z8 Microcontroller Family Compatible  
64K  
X86C64  
8192 x 8 Bit  
E2 Micro-Peripheral  
FEATURES  
DESCRIPTION  
CONCURRENT READ WRITE™  
—Dual Plane Architecture  
Isolates Read/Write Functions  
Between Planes  
2
The X86C64 is an 8K x 8 E PROM fabricated with  
advanced CMOS Textured Poly Floating Gate Technol-  
ogy. The X86C64 features a Multiplexed Address and  
Data bus allowing direct interface to a variety of popular  
single-chipmicrocontrollersoperatinginexpandedmul-  
tiplexed mode without the need for additional interface  
circuitry.  
Allows Continuous Execution of Code  
From One Plane While Writing in the Other  
Plane  
Multiplexed Address/Data Bus  
—Direct Interface to Popular 8-bit  
Microcontrollers, e.g. Zilog Z8 Family  
High Performance CMOS  
—Fast Access Time, 120 ns  
—Low Power  
The X86C64 is internally configured as two indepen-  
dent 4K x 8 memory arrays. This feature provides the  
ability to perform nonvolatile memory updates in one  
array and continue operation out of code stored in the  
other array; effectively eliminating the need for an aux-  
iliary memory device for code storage.  
60 mA Maximum Active  
To write to the X86C64, a three byte command  
sequence must precede the byte(s) being written. The  
X86C64 also provides a second generation software  
data protection scheme called Block Protect. Block  
Protect can provide write lockout of the entire device or  
selected 1K blocks. There are eight, 1K x 8 blocks that  
can be write protected individually in any combination  
required by the user. Block Protect, in addition to Write  
Control input, allows the different segments of the  
memory to have varying degrees of alterability in nor-  
mal system operation.  
200 µA Maximum Standby  
Software Data Protection  
Block Protect Register  
—Individually Set Write Lock Out in 1K Blocks  
Toggle Bit  
—Early End of Write Detection  
Page Mode Write  
—Allows up to 32 Bytes to be Written in  
One Write Cycle  
High Reliability  
—Endurance: 10,000 Write Cycle  
—Data Retention: 100 Years  
FUNCTIONAL DIAGRAM  
WC  
CE  
A12  
R/W  
CONTROL  
LOGIC  
SOFTWARE  
DATA  
PROTECT  
DS  
SEL  
A12  
X
L
A
T
C
H
E
S
D
E
C
O
D
E
A12  
M
1K BYTES  
1K BYTES  
1K BYTES  
1K BYTES  
1K BYTES  
1K BYTES  
1K BYTES  
1K BYTES  
A8–A11  
AS  
U
X
Y DECODE  
I/O & ADDRESS LATCHES AND BUFFERS  
A/D0–A/D7  
3819 FHD F02  
Z8® is a registered trademark of Zilog Corporation  
CONCURRENT READ WRITEis a trademark of Xicor, Inc.  
© Xicor, 1991 Patents Pending  
3819-2.1 7/29/96 T0/C1/D1 SH  
Characteristics subject to change without notice  
1

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