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X76F128Y-2.7 PDF预览

X76F128Y-2.7

更新时间: 2024-10-02 22:10:35
品牌 Logo 应用领域
XICOR 内存集成电路
页数 文件大小 规格书
17页 94K
描述
Secure SerialFlash

X76F128Y-2.7 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknownIs Samacsys:N
其他特性:100000 ENDURANCE WRITE CYCLES; DATA RETENTION = 100 YEARS数据保留时间-最小值:100
耐久性:100000 Write/Erase CyclesJESD-30 代码:X-XXMA-X6
内存密度:131584 bit内存集成电路类型:FLASH CARD
内存宽度:8功能数量:1
端子数量:6字数:16448 words
字数代码:16448工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:16448X8封装主体材料:UNSPECIFIED
封装形状:UNSPECIFIED封装形式:MICROELECTRONIC ASSEMBLY
并行/串行:SERIAL编程电压:3 V
认证状态:Not Qualified最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子形式:UNSPECIFIED端子位置:UNSPECIFIED
类型:NOR TYPEBase Number Matches:1

X76F128Y-2.7 数据手册

 浏览型号X76F128Y-2.7的Datasheet PDF文件第2页浏览型号X76F128Y-2.7的Datasheet PDF文件第3页浏览型号X76F128Y-2.7的Datasheet PDF文件第4页浏览型号X76F128Y-2.7的Datasheet PDF文件第5页浏览型号X76F128Y-2.7的Datasheet PDF文件第6页浏览型号X76F128Y-2.7的Datasheet PDF文件第7页 
128K  
16Kx8+64x8  
X76F128  
Secure SerialFlash  
FEATURES  
DESCRIPTION  
• 64-bit Password Security  
—Five 64-bit Passwords for Read, Program  
and Reset  
• 16384 Byte+64 Byte Password Protected Arrays  
—Seperate Read Passwords  
—Seperate Write Passwords  
—Reset Password  
• Programmable Passwords  
• Retry Counter Register  
—Allows 8 tries before clearing of both arrays  
Password Protected Reset  
• 32-bit Response to Reset (RST Input)  
• 64 byte Sector Program  
• 400kHz Clock Rate  
The X76F128 is a Password Access Security Supervisor,  
containing one 131072-bit Secure SerialFlash array and  
one 512-bit Secure SerialFlash array. Access to each  
memory array is controlled by two 64-bit passwords.  
These passwords protect read and write operations of  
the memory array. A separate RESET password is used  
to reset the passwords and clear the memory arrays in  
the event the read and write passwords are lost.  
The X76F128 features a serial interface and software  
protocol allowing operation on a popular two wire bus.  
The bus signals are a clock Input (SCL) and a bidirec-  
tional data input and output (SDA). Access to the device  
is controlled through a chip select (CS) input, allowing  
any number of devices to share the same bus.  
• 2 wire Serial Interface  
• Low Power CMOS  
—2.7 to 5.5V operation  
The X76F128 also features a synchronous response to  
reset providing an automatic output of a hard-wired 32-bit  
data stream conforming to the industry standard for  
memory cards.  
—Standby current Less than 1µA  
—Active current less than 3 mA  
• High Reliability Endurance:  
—100,000 Write Cycles  
• Data Retention: 100 years  
• Available in:  
TM  
The X76F128 utilizes Xicor’s proprietary Direct Write  
cell, providing a minimum endurance of 100,000 cycles  
and a minimum data retention of 100 years.  
—SmartCard Module  
—TQFP Package  
Functional Diagram  
CS  
CHIP ENABLE  
16K BYTE  
SerialFlash ARRAY  
ARRAY 0  
DATA TRANSFER  
SCL  
(PASSWORD PROTECTED)  
SDA  
ARRAY ACCESS  
ENABLE  
INTERFACE  
LOGIC  
64 BYTE  
SerialFlash ARRAY  
ARRAY 1  
PASSWORD ARRAY  
AND PASSWORD  
(PASSWORD PROTECTED)  
VERIFICATION LOGIC  
RST  
RESET  
RETRY COUNTER  
RESPONSE REGISTER  
7052 FM 01  
Xicor, Inc. 1994, 1995, 1996 Patents Pending  
7052 10/7/97 T0/C0/D0 SH  
Characteristics subject to change without notice  
1

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