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X68257SM PDF预览

X68257SM

更新时间: 2024-11-19 22:12:35
品牌 Logo 应用领域
XICOR 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
14页 72K
描述
E2 Micro-Peripheral

X68257SM 技术参数

生命周期:Obsolete包装说明:PLASTIC, SOIC-28
Reach Compliance Code:unknown风险等级:5.84
Is Samacsys:N最长访问时间:120 ns
JESD-30 代码:R-PDSO-G28长度:17.9 mm
内存密度:262144 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:28字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:32KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL编程电压:5 V
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
Base Number Matches:1

X68257SM 数据手册

 浏览型号X68257SM的Datasheet PDF文件第2页浏览型号X68257SM的Datasheet PDF文件第3页浏览型号X68257SM的Datasheet PDF文件第4页浏览型号X68257SM的Datasheet PDF文件第5页浏览型号X68257SM的Datasheet PDF文件第6页浏览型号X68257SM的Datasheet PDF文件第7页 
68XX Microcontroller Family Compatible  
256K  
X68257  
32,768 x 8 Bit  
E2 Micro-Peripheral  
FEATURES  
DESCRIPTION  
2
• Multiplexed Address/Data Bus  
—Direct Interface to Popular 68HC11 Family  
• High Performance CMOS  
—Fast Access Time, 120ns  
—Low Power  
—60mA Active Maximum  
—500µA Standby Maximum  
• Software Data Protection  
• Toggle Bit Polling  
The X68257 is an 32K x 8 E PROM fabricated with  
advanced CMOS Textured Poly Floating Gate Technol-  
ogy. The X68257 features a multiplexed address and  
data bus allowing direct interface to a variety of popular  
single-chipmicrocontrollersoperatinginexpandedmul-  
tiplexed mode without the need for additional interface  
circuitry.  
—Early End of Write Detection  
• Page Mode Write  
—Allows up to 128 Bytes to be Written in  
One Write Cycle  
• High Reliability  
—Endurance: 10,000 Write Cycle  
—Data Retention: 100 Years  
• 28-Lead PDIP Package  
• 28-Lead SOIC Package  
• 32-Lead PLCC Package  
FUNCTIONAL DIAGRAM  
CE, CE  
R/W  
CONTROL  
LOGIC  
SOFTWARE  
DATA  
E
PROTECT  
SEL  
X
L
A
T
C
H
E
S
D
E
C
O
D
E
A –A  
8
14  
32K x 8  
2
AS  
E PROM  
Y DECODE  
I/O & ADDRESS LATCHES AND BUFFERS  
A/D –A/D  
0
7
6539 ILL F02.2  
© Xicor, Inc. 1994, 1995, 1996 Patents Pending  
6539-1.7 9/16/96 T0/C1/D2 SH  
Characteristics subject to change without notice  
1

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