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X5001S8-2.7A PDF预览

X5001S8-2.7A

更新时间: 2024-09-25 22:12:39
品牌 Logo 应用领域
XICOR 电源电路电源管理电路光电二极管监控
页数 文件大小 规格书
19页 101K
描述
CPU Supervisor

X5001S8-2.7A 技术参数

是否Rohs认证:不符合生命周期:Transferred
包装说明:PLASTIC, SOIC-8Reach Compliance Code:unknown
风险等级:5.73Is Samacsys:N
可调阈值:YES模拟集成电路 - 其他类型:POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
信道数量:1功能数量:1
端子数量:8最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:3/5 V认证状态:Not Qualified
子类别:Power Management Circuits最大供电电流 (Isup):5 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUALBase Number Matches:1

X5001S8-2.7A 数据手册

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X5001  
CPU Supervisor  
Features  
DESCRIPTION  
• 200ms Power On Reset Delay  
• Low Vcc Detection and Reset Assertion  
Five Standard ResetThreshold Voltages  
Adjust Low Vcc ResetThreshold Voltage using  
special programming sequence  
Reset Signal Valid to Vcc=1V  
• Selectable Nonvolatile WatchdogTimer  
0.2, 0.6, 1.4 seconds  
This device combines three popular functions, Power on  
Reset, Watchdog Timer, and Supply Voltage Supervision  
in one package. This combination lowers system cost,  
reduces board space requirements, and increases reli-  
ability.  
The Watchdog Timer provides an independent protection  
mechanism for microcontrollers. During a system failure,  
the device will respond with a RESET signal after a  
selectable time-out interval. The user selects the interval  
from three preset values. Once selected, the interval  
does not change, even after cycling the power.  
Off selection  
Select settings through software  
• Long Battery Life With Low Power Consumption  
<50µA Max Standby Current,Watchdog On  
<1µA Max Standby Current,Watchdog Off  
• 2.7V to 5.5V Operation  
The user’s system is protected from low voltage condi-  
tions by the device’s low Vcc detection circuitry. When  
Vcc falls below the minimum Vcc trip point, the system is  
reset. RESET is asserted until Vcc returns to proper  
operating levels and stabilizes. Five industry standard  
• SPI Mode 0 interface  
• Built-in Inadvertent Write Protection  
Power-Up/Power-Down Protection Circuitry  
Watchdog Change Latch  
• High Reliability  
• Available Packages  
8-LeadTSSOP  
8-Lead SOIC  
—8 Pin PDIP  
V
thresholds are available, however, Xicor’s unique  
TRIP  
circuits allow the thresold to be reprogrammed to meet  
custom requirements or to fine-tune the threshold for  
applications requiring higher precision.  
The device utilizes Xicor’s proprietary Direct WriteTM cell  
for the Watchdog TImer control bits and the V  
stor-  
TRIP  
age element, providing a minimum endurance of  
100,000 write cycles and a minimum data retention of  
100 years.  
Block Diagram  
RESET  
WATCHDOG  
TRANSITION  
DETECTOR  
WATCHDOG  
TIMER  
SI  
DATA  
REGISTER  
RESET &  
WATCHDOG  
TIMEBASE  
SO  
COMMAND  
DECODE &  
CONTROL  
LOGIC  
SCK  
CS/WDI  
POWER ON/  
LOW VOLTAGE  
RESET  
V
+
-
CC  
GENERATION  
V
TRIP  
7036 FRM 01  
Xicor, Inc. 1994, 1995, 1996, 1998 Patents Pending  
7078 1.1 8/9/99 CM  
Characteristics subject to change without notice  
1

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