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X4283AP PDF预览

X4283AP

更新时间: 2024-11-18 21:57:03
品牌 Logo 应用领域
XICOR 监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
22页 405K
描述
CPU Supervisor with 128K EEPROM

X4283AP 数据手册

 浏览型号X4283AP的Datasheet PDF文件第2页浏览型号X4283AP的Datasheet PDF文件第3页浏览型号X4283AP的Datasheet PDF文件第4页浏览型号X4283AP的Datasheet PDF文件第5页浏览型号X4283AP的Datasheet PDF文件第6页浏览型号X4283AP的Datasheet PDF文件第7页 
Preliminary Information  
128K  
16K x 8 Bit  
X4283/85  
CPU Supervisor with 128K EEPROM  
FEATURES  
DESCRIPTION  
• Selectable watchdog timer  
The X4283/85 combines four popular functions,  
Power-on Reset Control, Watchdog Timer, Supply Volt-  
age Supervision, and Block Lock protect serial  
EEPROM memory in one package. This combination  
lowers system cost, reduces board space require-  
ments, and increases reliability.  
• Low V  
detection and reset assertion  
CC  
—Four standard reset threshold voltages  
—Adjust low V reset threshold voltage using  
CC  
special programming sequence  
—Reset signal valid to V = 1V  
CC  
• Low power CMOS  
Applying power to the device activates the power on  
reset circuit which holds RESET/RESET active for a  
period of time. This allows the power supply and oscilla-  
tor to stabilize before the processor can execute code.  
—<20µA max standby current, watchdog on  
—<1µA standby current, watchdog OFF  
—3mA active current  
• 128Kbits of EEPROM  
—64 byte page write mode  
—Self-timed write cycle  
The Watchdog Timer provides an independent protec-  
tion mechanism for microcontrollers. When the micro-  
controller fails to restart a timer within a selectable  
time out interval, the device activates the RESET/  
RESET signal. The user selects the interval from three  
preset values. Once selected, the interval does not  
change, even after cycling the power.  
—5ms write cycle time (typical)  
• Built-in inadvertent write protection  
Power-up/power-down protection circuitry  
—Protect 0, 1/4, 1/2, all or 64, 128, 256 or 512  
bytes of EEPROM array with programmable  
Block Lockprotection  
• 400kHz 2-wire interface  
• 2.7V to 5.5V power supply operation  
• Available packages  
The device’s low V  
detection circuitry protects the  
CC  
user’s system from low voltage conditions, resetting  
the system when V falls below the set minimum V  
CC  
CC  
returns  
trip point. RESET/RESET is asserted until V  
CC  
—8-lead SOIC  
—8-lead TSSOP  
to proper operating level and stabilizes. Four industry  
BLOCK DIAGRAM  
Watchdog Transition  
Detector  
Watchdog  
Timer Reset  
WP  
Protect Logic  
RESET (X4283)  
RESET (X4285)  
Data  
Register  
SDA  
Status  
Register  
EEPROM Array  
Command  
Reset &  
Watchdog  
Timebase  
SCL  
Decode &  
Control  
Logic  
S0  
S1  
V
Threshold  
CC  
Reset logic  
Power on and  
Low Voltage  
Reset  
+
-
V
CC  
Generation  
V
TRIP  
Characteristics subject to change without notice. 1 of 22  
REV 1.17 11/27/00  
www.xicor.com  

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