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X28LC512JI-20 PDF预览

X28LC512JI-20

更新时间: 2024-11-25 22:11:59
品牌 Logo 应用领域
XICOR 可编程只读存储器
页数 文件大小 规格书
19页 101K
描述
3.3 Volt, Byte Alterable E2PROM

X28LC512JI-20 数据手册

 浏览型号X28LC512JI-20的Datasheet PDF文件第2页浏览型号X28LC512JI-20的Datasheet PDF文件第3页浏览型号X28LC512JI-20的Datasheet PDF文件第4页浏览型号X28LC512JI-20的Datasheet PDF文件第5页浏览型号X28LC512JI-20的Datasheet PDF文件第6页浏览型号X28LC512JI-20的Datasheet PDF文件第7页 
512K  
X28LC512/X28LC513  
64K x 8 Bit  
3.3 Volt, Byte Alterable E2PROM  
FEATURES  
Two PLCC and LCC Pinouts  
—X28LC512  
—X28LC010 E PROM Pin Compatible  
—X28LC513  
Low V Operation: V = 3.3V ±10%  
CC  
CC  
2
Access Time: 150ns  
Simple Byte and Page Write  
2
—Compatible with Lower Density E PROMs  
—Self-Timed  
—No Erase Before Write  
—No Complex Programming Algorithms  
—No Overerase Problem  
Low Power CMOS:  
DESCRIPTION  
2
The X28LC512/513 is a low-power 64K x 8 E PROM,  
fabricated with Xicor’s proprietary, high performance,  
floating gate CMOS technology. The X28LC512/513  
featurestheJEDECapprovedpinoutforbytewidememo-  
ries, compatible with industry standard EPROMS.  
—Active: 25mA  
—Standby: 150µA  
Software Data Protection  
—Protects Data Against System Level  
Inadvertant Writes  
High Speed Page Write Capability  
Highly Reliable Direct Write™ Cell  
—Endurance: 10,000 Write Cycles  
—Data Retention: 100 Years  
Early End of Write Detection  
DATA Polling  
The X28LC512/513 supports a 128-byte page write  
operation, effectively providing a 39µs/byte write cycle  
andenablingtheentirememorytobewritteninlessthan  
2.5 seconds. The X28LC512/513 also features DATA  
Polling and Toggle Bit Polling, system software support  
schemes used to indicate the early completion of a write  
cycle. In addition, the X28LC512/513 supports the Soft-  
ware Data Protection option.  
—Toggle Bit Polling  
PLCC  
PIN CONFIGURATIONS  
30  
4 3  
2
32 31  
A
A
5
29  
28  
27  
26  
25  
24  
23  
22  
A
A
A
A
A
7
6
5
4
3
2
1
0
0
14  
13  
8
1
PLASTIC DIP  
TSOP  
6
A
7
A
A
A
OE  
A
1
2
3
4
5
6
7
8
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
11  
9
8
A
NC  
NC  
1
2
3
4
5
6
7
8
9
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
8
V
9
CC  
X28LC512  
(TOP VIEW)  
10  
A
9
11  
CE  
I/O  
WE  
A
OE  
10  
11  
12  
13  
A
A
13  
14  
7
A
NC  
A
A
15  
12  
10  
I/O  
I/O  
I/O  
I/O  
6
5
4
3
A
CE  
A
NC  
NC  
NC  
WE  
A
14  
I/O  
I/O  
7
15 16 17 18 19 20  
A
A
21  
A
7
6
5
4
3
2
1
0
0
1
2
13  
14  
A
8
A
9
NC  
NC  
V
9
V
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
CC  
NC  
A
X28LC512  
3005 ILL F03  
SS  
A
A
NC  
NC  
NC  
NC  
NC  
I/O  
11  
PLCC  
X28LC512  
A
OE  
2
1
0
A
10  
11  
12  
13  
14  
15  
16  
A
10  
A
A
I/O  
I/O  
15  
12  
30  
A
CE  
4 3  
2
32 31  
A
A
A
A
A
A
A
5
29  
28  
27  
26  
25  
24  
23  
22  
A
A
A
A
A
A
A
A
A
1
A
6
5
4
3
2
1
0
8
7
6
5
4
0
A
1
I/O  
7
I/O  
6
I/O  
5
I/0  
4
6
9
7
I/O  
I/O  
I/O  
V
11  
2
NC  
OE  
A
8
A
3
X28LC513  
9
(TOP VIEW)  
10  
11  
12  
13  
10  
3005 ILL F22.2  
CE  
I/O  
3
SS  
NC  
I/O  
I/O  
7
I/O  
0
6
15 16 17 18 19 20  
21  
14  
3005 ILL F02.1  
3005 ILL F04.1  
© Xicor, Inc. 1991, 1995, 1996 Patents Pending  
3005-3.2 8/5/97 T2/C0/D0 EW  
Characteristics subject to change without notice  
1

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