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X24F128 PDF预览

X24F128

更新时间: 2024-01-08 05:24:17
品牌 Logo 应用领域
XICOR /
页数 文件大小 规格书
16页 82K
描述
2-Wire SerialFlash with Block Lock TM Protection

X24F128 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:PLASTIC, SOIC-16Reach Compliance Code:unknown
风险等级:5.92Is Samacsys:N
其他特性:2-WIRE SERIAL INTERFACE最大时钟频率 (fCLK):0.1 MHz
数据保留时间-最小值:100耐久性:100000 Write/Erase Cycles
I2C控制字节:1010DDDRJESD-30 代码:R-PDSO-G16
JESD-609代码:e0长度:9.905 mm
内存密度:131072 bit内存集成电路类型:FLASH
内存宽度:8功能数量:1
端子数量:16字数:16384 words
字数代码:16000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-20 °C
组织:16KX8输出特性:OPEN-DRAIN
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/3.3 V
编程电压:1.8 V认证状态:Not Qualified
座面最大高度:1.75 mm串行总线类型:I2C
最大待机电流:0.000001 A子类别:Flash Memories
最大压摆率:0.003 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.8 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
类型:NOR TYPE宽度:3.9 mm
最长写入周期时间 (tWC):10 ms写保护:HARDWARE/SOFTWARE
Base Number Matches:1

X24F128 数据手册

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APPLICATION NOTE  
A V A I L A B L E  
AN84  
128K  
16K x 8 Bit  
X24F128  
2-Wire SerialFlash with Block LockTM Protection  
FEATURES  
DESCRIPTION  
The X24F128 is a CMOS SerialFlash Memory, inter-  
nally organized 16K x 8. The device features a serial  
interface and software protocol allowing operation on a  
simple two wire bus.  
Save Critical Data With Programmable  
Block Lock Protection  
—Block Lock (0, 1/4, 1/2, or all of E PROM Array)  
2
—Software Program Protection  
—Programmable Hardware Program Protect  
In Circuit Programmable ROM Mode  
Longer Battery Life With Lower Power  
—Active Read Current Less Than 1mA  
—Active Program Current Less Than 3mA  
—Standby Current Less Than 1µA  
1.8V to 3.6V or 5V “Univolt” Read and  
Program Power Supply Versions  
32 Word Sector Program Mode  
—Minimizes Total Program Time Per Word  
100KHz 2-Wire Serial Interface  
Internally Organized 16K x 8  
Bidirectional Data Transfer Protocol  
Self-Timed Program Cycle  
—Typical Program Cycle Time of 5ms  
High Reliability  
Three device select inputs (S –S ) allow up to eight  
0
2
devices to share a common two wire bus.  
A Program Protect Register at the address location  
FFFFh provides three program protection features:  
Software Program Protect, Block Lock Protect, and  
Hardware Program Protect. The Software Program  
Protect feature prevents any nonvolatile writes to the  
device until the PEL bit in the Program Protect  
Register is set. The Block Lock Protection feature  
allows the user to individually block protect four blocks  
of the array by programming two bits in the Program  
Protect Register. The Programmable Hardware  
Program Protect feature allows the user to install the  
device with PP tied to V , program the entire memory  
CC  
array in circuit, and then enable the hardware program  
protection by programming a PPEN bit in the Program  
Protect Register. After this, selected blocks of the  
array, including the Program Protect Register itself, are  
permanently protected from being erased.  
—Endurance: 100,000 Cycles  
—Data Retention: 100Years  
8-Lead DIP  
16-Lead SOIC  
FUNCTIONAL DIAGRAM  
DATA REGISTER  
Y DECODE LOGIC  
SERIALFLASH DATA  
AND ADDRESS (SDA)  
COMMAND  
DECODE  
AND  
CONTROL  
LOGIC  
SERIALFLASH  
SCL  
SECTOR  
DECODE  
LOGIC  
ARRAY  
16K x 8  
4K x 8  
4K x 8  
BLOCK LOCK AND  
PROGRAM PROTECT  
CONTROL LOGIC  
S2  
DEVICE  
SELECT  
PROGRAM  
PROTECT  
REGISTER  
S1  
LOGIC  
S0  
8K x 8  
PROGRAM VOLTAGE  
CONTROL  
PP  
7012 ILL F01.4  
Xicor, 1995, 1996 Patents Pending  
Characteristics subject to change without notice  
7012-0.8 11/25/96 T1/C0/D0 SH  
1

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