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X24F064VE-5 PDF预览

X24F064VE-5

更新时间: 2024-02-22 08:17:54
品牌 Logo 应用领域
XICOR 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
页数 文件大小 规格书
18页 87K
描述
SerialFlash TM Memory with Block Lock TM Protection

X24F064VE-5 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:PLASTIC, TSSOP-20Reach Compliance Code:unknown
风险等级:5.92Is Samacsys:N
其他特性:2-WIRE SERIAL FLASH最大时钟频率 (fCLK):0.1 MHz
数据保留时间-最小值:100耐久性:100000 Write/Erase Cycles
I2C控制字节:DDMMMMMRJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:6.5 mm
内存密度:65536 bit内存集成电路类型:EEPROM
内存宽度:8功能数量:1
端子数量:20字数:8192 words
字数代码:8000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-20 °C
组织:8KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:1.2 mm
串行总线类型:I2C最大待机电流:0.00001 A
子类别:Flash Memories最大压摆率:0.003 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED类型:NOR TYPE
宽度:4.4 mm最长写入周期时间 (tWC):10 ms
写保护:HARDWARE/SOFTWAREBase Number Matches:1

X24F064VE-5 数据手册

 浏览型号X24F064VE-5的Datasheet PDF文件第2页浏览型号X24F064VE-5的Datasheet PDF文件第3页浏览型号X24F064VE-5的Datasheet PDF文件第4页浏览型号X24F064VE-5的Datasheet PDF文件第5页浏览型号X24F064VE-5的Datasheet PDF文件第6页浏览型号X24F064VE-5的Datasheet PDF文件第7页 
APPLICATION  
NOTE  
A V A I L A B L E  
AN76 • AN78 • AN81 • AN87  
64K/32K/16K  
8K/4K/2K x 8 Bit  
X24F064/032/016  
SerialFlashTM Memory with Block LockTM Protection  
FEATURES  
DESCRIPTION  
1.8V to 3.6V or 5V “Univolt” Read and  
Program Power Supply Versions  
Low Power CMOS  
The X24F064/032/016 is  
a
CMOS SerialFlash  
Memory Family, internally organized 8K/4K/2K x 8.  
The family features a serial interface and software  
protocol allowing operation on a simple two wire bus.  
—Active Read Current Less Than 1mA  
—Active Program Current Less Than 3mA  
—Standby Current Less Than 1µA  
Internally Organized 8K/4K/2K x 8  
New Programmable Block Lock Protection  
—Software Write Protection  
—Programmable hardware Write Protect  
Block Lock (0, 1/4, 1/2, or all of the Flash  
Memory array)  
Device select inputs (S , S , S ) allow up to eight  
0
1
2
devices to share a common two wire bus.  
A Program Protect Register accessed at the highest  
address location, provides three new programming  
protection features: Software Programming Protection,  
Block Lock Protection, and Hardware Programming  
Protection. The Software Programming Protection  
feature prevents any nonvolatile writes to the device  
until the WEL bit in the program protect register is set.  
The Block LockTM Protection feature allows the user to  
individually protect four blocks of the array by program-  
ming two bits in the programming protect register. The  
Programmable Hardware Program Protect feature  
allows the user to install each device with PP tied to  
2 Wire Serial Interface  
Bidirectional Data Transfer Protocol  
32 Byte Sector Programming  
Self Timed Program Cycle  
—Typical Programming Time of 5ms  
Per Sector  
High Reliability  
—Endurance: 100,000 cycles per byte  
—Data Retention: 100 Years  
Available Packages  
V
, program the entire memory array in place, and  
CC  
then enable the hardware programming protection by  
programming a PPEN bit in the program protect  
register. After this, selected blocks of the array,  
including the program protect register itself, are  
permanently protected from being programmed.  
—8-Lead PDIP  
—8-Lead SOIC (JEDEC)  
—14-Lead TSSOP (X24F032/016)  
—20-Lead TSSOP (X24F064)  
FUNCTIONAL DIAGRAM  
DATA REGISTER  
SDA  
SECTOR DECODE LOGIC  
SCL  
32  
8
X
DECODE  
LOGIC  
COMMAND  
DECODE  
AND CONTROL  
LOGIC  
SECTORED  
MEMORY  
ARRAY  
S0/S0  
S1/S1  
S2/S2  
PROGRAM  
PROTECT  
REGISTER  
HIGH VOLTAGE  
CONTROL  
PROGRAMMING  
CONTROL LOGIC  
PP  
SerialFlash Memory and Block Lock  
Protection are trademarks of Xicor, Inc.  
6686 ILL F01.5  
Xicor, 1995, 1996 Patents Pending  
6686-3.8 8/29/96 T3/C0/D0 SH  
Characteristics subject to change without notice  
1

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